参数资料
型号: DS2252T-64-16
厂商: Maxim Integrated Products
文件页数: 12/16页
文件大小: 0K
描述: IC MICROCNTRLR 64K 16MHZ 40-SIMM
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: DS225x
核心处理器: 8051
芯体尺寸: 8-位
速度: 16MHz
连通性: SIO,UART/USART
外围设备: 电源故障复位,WDT
输入/输出数: 32
程序存储器类型: SRAM
RAM 容量: 64K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 40-SIMM
包装: 托盘
DS2252T
5 of 16
PIN
DESCRIPTION
17
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally, can be left unconnected if not used. An RC power-
on reset circuit is not needed and is NOT recommended.
22
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a
’373 type transparent latch.
35, 37
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1
is the input to an inverting amplifier and XTAL2 is the output.
39
GND - Logic ground.
2
VCC - +5V.
24
PROG
- Invokes the Bootstrap loader on a falling edge. This signal should be
debounced so that only one edge is detected. If connected to ground, the
microcontroller will enter Bootstrap loading on power up. This signal is pulled up
internally.
20
SDI – Self-Destruct Input. A logic 1 applied to this input causes a hardware unlock.
This involves the destruction of Encryption Keys, Vector RAM, and the momentary
removal of power from VCCO. This pin should be grounded if not used.
INSTRUCTION SET
The DS2252T executes an instruction set that is object code-compatible with the industry standard 8051
microcontroller. As a result, software development packages such as assemblers and compilers that have
been written for the 8051 are compatible with the DS2252T. A complete description of the instruction set
and operation are provided in the Secure Microcontroller User’s Guide.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS2252T. The entire 64k of program and 64k of
data are available to the Byte-wide bus. This preserves the I/O ports for application use. An alternate
configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Any data area not mapped
into the NV RAM is reached via the Expanded bus on Ports 0 and 2. Off-board program memory is not
available for security reasons. Selecting PES = 1 provides access to the real-time clock as shown in
Figure 4. These selections are made using Special Function Registers. The memory map and its controls
are covered in detail in the Secure Microcontroller User’s Guide.
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