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MAX15018/MAX15019
125V/3A, High-Speed,
Half-Bridge MOSFET Drivers
8
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Detailed Description
The MAX15018A/MAX15018B/MAX15019A/MAX15019B
half-bridge, n-channel MOSFET drivers control high-
and low-side MOSFETs in high-voltage, high peak-cur-
rent applications and offer a high 125V voltage range
that allows ample margin above the 100V transient
specification of telecom standards. These drivers oper-
ate with an IC supply voltage of 8V to 12.6V, and con-
sume only 2.75mA of supply current during typical
switching operations. The MAX15018_/MAX15019_ pro-
vide 3A (typ) sink/source peak current per output and
are capable of operating with large capacitive loads
and with switching frequencies near 1MHz.
These drivers are intended to be used to drive the
high-side MOSFET without requiring an isolation device
such as an optocoupler or a drive transformer. The
high-side driver is controlled by a TTL/CMOS logic sig-
nal referenced to ground and is powered by a boot-
strap circuit formed by an integrated diode and an
external capacitor. Undervoltage lockout (UVLO) pro-
tection is provided for both the high- and low-side dri-
ver supplies (BST and VDD) and includes a UVLO
hysteresis of 0.5V (typ).
The drivers are independently controlled and feature
exceptionally fast switching times, very short propaga-
tion delays (35ns typ), and matched propagation delay-
times (2ns typ) between drivers, making them ideally
suited for high-frequency applications. Internal logic cir-
cuitry prevents shoot-through during output state
changes and minimizes package power dissipation.
These devices are available with CMOS (VDD/2) or TTL
logic-level inputs. The MAX15018A/MAX15018B accept
CMOS input logic levels, while the MAX15019A/
MAX15019B accept TTL input logic levels. For both ver-
sions, the logic inputs are protected against voltage
spikes up to +15V, regardless of VDD. See the Driver
Logic Inputs (IN_H, IN_L) section.
The MAX15018_/MAX15019_ are available with both
high-side and low-side noninverting logic inputs or with
noninverting high-side and inverting low-side logic inputs.
See the
Functional Diagrams and Selector Guide. The
MAX15018A and MAX15019A are pin-for-pin replace-
ments for the HIP2100IB and HIP2101IB, respectively.
The MAX15018_/MAX15019_ are available in a space-
saving, high-power, 8-pin SO-EP package that can dissi-
pate up to 1.95W at +70°C. All devices operate over the
-40°C to +125°C automotive temperature range.
Undervoltage Lockout
Both the high- and low-side drivers feature separate
UVLO protection that monitors each driver’s input sup-
ply voltage (BST and VDD). The low-side driver UVLO
threshold (VDD_UVLO) is referenced to GND and pulls
both driver outputs low when VDD falls below 7.3V (typ).
The high-side driver UVLO threshold (VBST_UVLO) is ref-
erenced to HS, and only pulls DH low when VBST falls
below 6.9V (typ) with respect to HS. After the IC is first
energized, and once VDD rises above its UVLO thresh-
old, DL starts switching and either follows the IN_L logic
input (MAX15018A/MAX15019A) or is inverted with refer-
ence
to
the
IN_L
logic
input
(MAX15018B/
MAX15019B). At this time, the bootstrap capacitor is not
charged, and DH does not switch since the BST-to-HS
voltage is below VBST_UVLO. Within a short time follow-
ing engagement of low-side switching, CBST charges
through VDD and causes VBST to exceed VBST_UVLO.
DH then starts switching and follows IN_H. For synchro-
nous buck and half-bridge converter topologies, the
bootstrap capacitor can charge up in one cycle. Normal
operation then begins in a few microseconds after the
BST-to-HS voltage exceeds VBST_UVLO. In the two-
switch forward topology, CBST takes more time (a few
hundred microseconds) to charge and increase its volt-
age above VBST_UVLO. The typical hysteresis for both
UVLO thresholds is 0.5V. The bootstrap capacitor value
should be selected carefully to avoid oscillations during
turn-on and turn-off at the DH output. Choose a capaci-
tor value 20 times greater than the total gate capaci-
tance of the MOSFET. Use a low ESR-type X7R
dielectric ceramic capacitor at BST (typically a 0.1F
ceramic is adequate) and a parallel combination of 1F
and 0.1F ceramic capacitors from VDD to GND. The
high-side MOSFET’s continuous on-time is limited due
to the charge loss from the high-side driver’s quiescent
current. The maximum on-time is dependent on the size
of CBST, IBST (190A, max), and VBST_UVLO.