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参数资料
| 型号： | DS2409P/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/18页 |
| 文件大小： | 0K |
| 描述： | IC COUPLER MICROLAN 1-WIRE 6TSOC |
| 标准包装： | 4,000 |
| 接口： | 1 线 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 封装/外壳： | 6-LSOJ |
| 供应商设备封装： | 6-TSOC |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
DS2409
12 of 18
1-WIRE SIGNALING
The DS2409 requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read
Data. All these signals except presence pulse are initiated by the bus master. The initialization sequence
required to begin any communication with the DS2409 is shown in Figure 8. A reset pulse followed by a
presence pulse indicates the DS2409 is ready to send or receive data given the correct ROM command
and control function command. The bus master transmits (TX) a reset pulse (tRSTL, minimum 480s). The
bus master then releases the line and goes into receive mode (RX). The 1-Wire bus is pulled to a high
state via the pullup resistor. After detecting the rising edge on the data line, the DS2409 waits (tPDH, 15s
to 60s) and then transmits the presence pulse (tPDL, 60s to 240s).
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 8
*In order not to mask interrupt signaling by other devices on the 1-Wire bus, tRSTL + tR should always be
less than 960s.
**The slew rate of the Presence Pulse is actively limited by the DS2409 to 1V/s typically to minimize
ringing. The slope of all other edges is controlled by the 1-Wire bus driver at the host.
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 9. All time slots are initiated by the
master driving the data line low. The falling edge of the data line synchronizes the DS2409 to the master
by triggering a delay circuit in the DS2409. During write time slots, the delay circuit determines when the
DS2409 will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit
determines how long the DS2409 will hold the data line low overriding the 1 generated by the master. If
the data bit is a “1”, the device will leave the read data time slot unchanged.
Not
Recommended
for
New
Design
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2411 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Silicon Serial Number with Vcc Input |
| DS2411C/W | 制造商:Maxim Integrated Products 功能描述:SINGLE, UNSORTED UN-BACKLAPPED WAFER - Gel-pak, waffle pack, wafer, diced wafer on film |
| DS2411MP000 | 制造商:Thomas & Betts 功能描述:200A,PLG,3P4W,MG,411,220V,400HZ |
| DS2411P | 功能描述:序列号注册 RoHS:否 制造商:Maxim Integrated 数据总线宽度: 电源电压-最大: 电源电压-最小: 最大工作温度: 最小工作温度: 安装风格: 封装 / 箱体: |
| DS2411P/R | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Silicon Serial Number with VCC Input |
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