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参数资料
| 型号： | DS2411X |
| 英文描述： | Silicon Serial Number with VCC Input |
| 中文描述： | 硅序列号与VCC输入 |
| 文件页数： | 4/11页 |
| 文件大小： | 231K |
| 代理商： | DS2411X |
DS2411
4 of 11
Note 11:
represents the time required for the pullup circuitry to pull the voltage on I/O up V
IL
to
V
TH
.
represents the time required for the pullup circuitry to pull the voltage on I/O up from
V
IL
to the input-high threshold of the bus master.
Interval begins when the voltage drops below V
TL
during a negative edge on I/O and ends
when the voltage rises above V
TH
during a positive edge on I/O.
Note 12:
Note 13:
OPERATION
The DS2411’s registration number is accessed through a single data line. The 48-bit serial number, 8-bit
family code, and 8-bit CRC are retrieved using the Dallas 1-Wire protocol. This protocol defines bus
transactions in terms of the bus state during specified time slots that are bus-master-generated falling
edges on the I/O pin. All data is read and written least significant bit first. The device requires a delay
between V
CC
power-up and initial 1-Wire communication, t
PWRP
(1200 s). During this time the device
may issue presence-detect pulses.
1-Wire BUS SYSTEM
The 1-Wire bus has a single bus master and one or more slaves. In all instances, the DS2411 is a slave
device. The bus master is typically either a microcontroller or a Dallas Semiconductor bridge chip such as
the DS2480, DS2490, or DS1481. The discussion of this bus system is broken down into three topics:
hardware configuration, transaction sequence, and 1-Wire signaling (signal type and timing).
Hardware Configuration
The 1-Wire bus has a single data line, I/O. It is important that each device on the bus be able to drive I/O
at the appropriate time. To facilitate this, each device has an open-drain or three-state output. The
DS2411 has an open-drain output with an internal circuit equivalent to that shown in Figure 3. The bus
master can have the same equivalent circuit. If a bidirectional pin is not available on the master, separate
output and input pins can be connected together. The bus requires a pullup resistor at the master end of
the bus, as shown in Figure 4. A multidrop bus consists of a 1-Wire bus with multiple slaves attached.
The 1-Wire bus has a maximum data rate of 15.4kbps in standard speed and 125kbps in overdrive.
The idle state for the 1-Wire bus is high. If a transaction needs to be suspended for any reason, I/O must
remain high if the transaction is to be resumed. If the bus is pulled low, slave devices on the bus will
interpret the low as either a timeslot, or a reset depending on the duration.
Figure 1. DS2411 REGISTRATION NUMBER
MSB
LSB
8-BIT CRC CODE
48-BIT SERIAL NUMBER
8-BIT FAMILY CODE
(01h)
MSB
MSB
LSB
MSB
LSB
LSB
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2411X#U | 功能描述:序列号注册 Silicon Serial Number w/Vcc Input RoHS:否 制造商:Maxim Integrated 数据总线宽度: 电源电压-最大: 电源电压-最小: 最大工作温度: 最小工作温度: 安装风格: 封装 / 箱体: |
| DS2413 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire Dual Channel Addressable Switch |
| DS2413_08 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire Dual Channel Addressable Switch |
| DS2413_1 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1-Wire Dual Channel Addressable Switch |
| DS2413AP-100-550 | 功能描述:接口 - 专用 RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
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