参数资料
| 型号： | DS24B33+T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/23页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 4KBIT TO92-3 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 4K (256 x 16) |
| 接口： | 1 线 |
| 电源电压： | 2.8 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | TO-226-3、TO-92-3（TO-226AA）成形引线 |
| 供应商设备封装： | TO-92-3 |
| 包装： | 带卷 (TR) |
DS24B33
1-Wire 4Kb EEPROM
ELECTRICAL CHARACTERISTICS (continued)
(T A = -40°C to +85°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IO PIN: 1-Wire WRITE
Write-Zero Low Time
(Notes 2, 16)
Write-One Low Time
(Notes 2, 16)
t W0L
t W1L
Standard speed
Overdrive speed
Standard speed
Overdrive speed
60
6
5
1
120
16
15
2
μs
μs
IO PIN: 1-Wire READ
Read Low Time
(Notes 2, 17)
Read Sample Time
(Notes 2, 17)
t RL
t MSR
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
1
t RL +
t RL +
15 -
2-
15
2
μs
μs
EEPROM
Programming Current
Programming Time
Write/Erase Cycles (Endurance)
(Notes 20, 21)
Data Retention (Notes 22, 23, 24)
I PROG
t PROG
N CY
t DR
(Note 18)
(Note 19)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
200,000
50,000
40
2
5
mA
ms
—
Years
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Limits are 100% production tested at T A = +25°C and/or T A = +85°C. Limits over the operating temperature range and
relevant supply voltage range are guaranteed by design and characterization. Typical values are not guaranteed.
System requirement.
When operating near the minimum operating voltage (2.8V), a falling edge slew rate of 15V/μs or faster is recommended.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system, 1-Wire recovery times,
and current requirements during EEPROM programming. The specified value here applies to systems with only one
device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that found
in the DS2482-x00 or DS2480B may be required.
Capacitance on the data pin could be 2500pF when V PUP is first applied. Once the parasite capacitance is charged, it
does not affect normal communication.
Guaranteed by design, characterization, and/or simulation only. Not production tested.
V TL , V TH , and V HY are a function of the internal supply voltage, which is a function of V PUP , R PUP , 1-Wire timing, and
capacitive loading on IO. Lower V PUP , higher R PUP , shorter t REC , and heavier capacitive loading all lead to lower values of
V TL , V TH , and V HY .
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO must be less than or equal to V ILMAX at all times while the master is driving IO to a logic 0 level.
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V TH is crossed during a rising edge on IO, the voltage on IO must drop by at least V HY to be detected as logic 0.
The I-V characteristic is linear for voltages less than +1V.
Applies to a single DS24B33 attached to a 1-Wire line.
Defines maximum possible bit rate. Equal to 1/(t W0LMIN + t RECMIN ).
Interval after t RSTL during which a bus master can read a logic 0 on IO if there is a DS24B33 present. The power-up presence
detect pulse could be outside this interval but will be complete within 2ms after power-up.
ε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V IL to V TH . The actual
maximum duration for the master to pull the line low is t W1LMAX + t F - ε and t W0LMAX + t F - ε , respectively.
δ in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V IL to the input high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t RLMAX + t F .
Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO should be such that during the
programming interval, the voltage at IO is greater than or equal to V PUPMIN . If V PUP in the system is close to V PUPMIN , then
a low-impedance bypass of R PUP , which can be activated during programming, may need to be added.
Maxim Integrated
3
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