参数资料
型号: DS2502S+T&R
厂商: Maxim Integrated Products
文件页数: 10/24页
文件大小: 0K
描述: IC OTP 1KBIT 8SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
格式 - 存储器: EPROMs
存储器类型: EPROM OTP
存储容量: 1K(1K x 1)
接口: 1 线 串行
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
DS2502
READ MEMORY [F0h]
The Read Memory command is used to read data from the 1024-bit EPROM data field. The bus master
follows the command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting
byte location within the data field. An 8-bit CRC of the command byte and address bytes is computed by
the DS2502 and read back by the bus master to confirm that the correct command word and starting
address were received. If the CRC read by the bus master is incorrect, a reset pulse must be issued and the
entire sequence must be repeated. If the CRC received by the bus master is correct, the bus master issues
read time slots and receives data from the DS2502 starting at the initial address and continuing until the
end of the 1024-bit data field is reached or until a reset pulse is issued. If reading occurs through the end
of memory space, the bus master may issue eight additional read time slots and the DS2502 will respond
with a 8-bit CRC of all data bytes read from the initial starting byte through the last byte of memory.
After the CRC is received by the bus master, any subsequent read time slots will appear as logical 1s until
a reset pulse is issued. Any reads ended by a reset pulse prior to reaching the end of memory will not have
the 8-bit CRC available.
Typically a 16-bit CRC would be stored with each page of data to ensure rapid, error-free data transfers
that eliminate having to read a page multiple times to determine if the received data is correct or not. (See
Application Note 114 for the recommended file structure.) If CRC values are imbedded within the data, a
reset pulse may be issued at the end of memory space during a Read Memory command.
READ STATUS [AAh]
The Read Status command is used to read data from the EPROM Status data field. The bus master
follows the command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting
byte location within the data field. An 8-bit CRC of the command byte and address bytes is computed by
the DS2502 and read back by the bus master to confirm that the correct command word and starting
address were received. If the CRC read by the bus master is incorrect, a reset pulse must be issued and the
entire sequence must be repeated. If the CRC received by the bus master is correct, the bus master issues
read time slots and receives data from the DS2502 starting at the supplied address and continuing until
the end of the EPROM Status data field is reached. At that point the bus master will receive an 8-bit CRC
that is the result of shifting into the CRC generator all of the data bytes from the initial starting byte
through the final factory-programmed byte that contains the 00h value.
This feature is provided since the EPROM Status information may change over time making it impossible
to program the data once and include an accompanying CRC that will always be valid. Therefore, the
Read Status command supplies a 8-bit CRC that is based on and always is consistent with the current data
stored in the EPROM Status data field.
After the 8-bit CRC is read, the bus master will receive logical 1s from the DS2502 until a reset pulse is
issued. The Read Status command sequence can be ended at any point by issuing a reset pulse.
READ DATA/GENERATE 8-BIT CRC [C3h]
The Read Data/Generate 8-bit CRC command is used to read data from the 1024-bit EPROM data field.
The bus master follows the command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that
indicates a starting byte location within the data field. An 8-bit CRC of the command byte and address
bytes is computed by the DS2502 and read back by the bus master to confirm that the correct command
word and starting address were received. If the CRC read by the bus master is incorrect, a reset pulse
must be issued and the entire sequence must be repeated. If the CRC received by the bus master is
correct, the bus master issues read time slots and receives data from the DS2502 starting at the initial
address and continuing until the end of a 32-byte page is reached. At that point the bus master will send
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