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参数资料
| 型号： | DS2505+T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC OTP 16KBIT TO92-3 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 格式 - 存储器： | EPROMs |
| 存储器类型： | EPROM OTP |
| 存储容量： | 16K（16K x 1） |
| 接口： | 1 线 串行 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | TO-226-3、TO-92-3（TO-226AA）成形引线 |
| 供应商设备封装： | TO-92-3 |
| 包装： | 带卷 (TR) |
DS2505
protocol has been satisfied. This protocol is described in the ROM functions flow chart (Figure 8). The
1-Wire bus master must first provide one of four ROM function commands: 1) Read ROM, 2) Match
ROM, 3) Search ROM, or 4) Skip ROM. After a ROM function sequence has been successfully
executed, the bus master may then provide any one of the memory function commands specific to the
DS2505 (Figure 5).
The 1-Wire CRC of the lasered ROM is generated using the polynomial X 8 + X 5 + X 4 + 1. Additional
information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book
of DS19xx iButton Standards. The shift register acting as the CRC accumulator is initialized to 0. Then
starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of
the family code has been entered, then the serial number is entered. After the 48 th bit of the serial number
has been entered, the shift register contains the CRC value. Shifting in the 8 bits of CRC should return
the shift register to all zeroes.
DS2505 BLOCK DIAGRAM Figure 1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2505-UNW | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
| DS2505-UNW-PPPP | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:UniqueWare Add-Only Memory |
| DS2506 | 制造商:Maxim Integrated Products 功能描述:ADD-O MEM 64KB, PR35 (GENERIC) - Rail/Tube |
| DS2506+ | 制造商:Maxim Integrated Products 功能描述:64-KBIT ADD-ONLY MEMORY 3PIN PR35 - Bulk |
| DS2506S | 制造商:Maxim Integrated Products 功能描述:ADD-O MEM 64KB, SOIC8 (GENERIC) - Rail/Tube |
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