参数资料
型号: DS26504LNB2+
厂商: Maxim Integrated Products
文件页数: 114/129页
文件大小: 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 160
功能: BITS 元件
接口: 64KCC,E1,T1
电路数: 1
电源电压: 3.14 V ~ 3.47 V
电流 - 电源: 150mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 管件
包括: *
其它名称: 90-26504+NB2
DS26504 T1/E1/J1/64KCC BITS Element
85 of 129
13.7 LIU Control Registers
Register Name:
LIC1
Register Description:
Line Interface Control 1
Register Address:
30h
Bit #
7
6
5
4
3
2
1
0
Name
L2
L1
L0
EGL
JAS
JABDS
DJA
TPD
Default
0
HW
Mode
L2
PIN 13
L1
PIN 12
L0
PIN 11
0
1
Bit 0: Transmit Power-Down (TPD)
0 = powers down the transmitter and three-states the TTIP and TRING pins
1 = normal transmitter operation
Bit 1: Disable Jitter Attenuator (DJA)
0 = jitter attenuator enabled
1 = jitter attenuator disabled
Bit 2/Jitter Attenuator Buffer Depth Select (JABDS)
0 = 128 bits
1 = 32 bits (use for delay-sensitive applications)
Bit 3: Jitter Attenuator Select (JAS)
0 = place the jitter attenuator on the receive side
1 = place the jitter attenuator on the transmit side
Bit 4: Receive Equalizer Gain Limit (EGL). This bit controls the sensitivity of the receive equalizer.
T1 Mode: 0 = -36dB (long haul)
1 = -15dB (limited long haul)
E1 Mode: 0 = -43dB (long haul)
1 = -12dB (short haul)
Bits 5, 6, 7: Line Build-Out Select (L0 to L2). When using the internal termination, the user needs only to select 000 for 75
operation or 001 for 120 operation. This selects the proper voltage levels for 75 or 120 operation. Using TT0, TT1, and
TT2 of the LICR4 register, users can then select the proper internal source termination. Line build-outs 100 and 101 are for
backwards compatibility with older products only.
E1 Mode
L2
L1
L0
APPLICATION
N (Note 1)
RETURN LOSS
Rt (Note 1)
0
75 normal
1:2
N.M.
0
1
120 normal
1:2
N.M.
0
1
0
75 with high return loss (Note 2)
1:2
21dB
6.2
1
0
1
120 with high return loss (Note 2)
1:2
21dB
11.6
N.M. = Not meaningful
Note 1: Transformer turns ratio.
Note 2: TT0, TT1, and TT2 of the LIC4 register must be set to zero in this configuration.
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