参数资料
| 型号： | DS26521DK |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/18页 |
| 文件大小： | 0K |
| 描述： | KIT DESIGN FOR DS26521 |
| 产品培训模块： | Lead (SnPb) Finish for COTS |
| 产品变化通告： | Product Discontinuation 20/Feb/2012 |
| 设计资源： | DS26521DK Gerber Files |
| 标准包装： | 1 |
| 主要目的： | 电信，调帧器和线路接口装置（LIU） |
| 已用 IC / 零件： | DS26521 |
| 已供物品： | 板，CD |
DS26521DK
TESTPOINTS AND CONNECTORS
The DS26521DK has several connectors, testpoints, oscillators, and jumpers. Table 2 provides a description of
these signals, given in order of appearance on the PC board, from left to right then top to bottom (with the board
held so that the RS-232 connector is on the top edge).
Table 2. Main Board PC Board Configuration
SILKSCREEN
REFERENCE
VCC 3.3V
(banana plug)
GND
(banana plug)
J05
J09
SW01
J11
J01
TP01, TP02
J03
J06
FUNCTION
Power supply
VDD
Power supply
Ground
RS232
Connector
OnCE BDM
Connector
System Reset
Flash VPP
Jumper
FPGA, JTAG
FPGA,
Testpoint
DS26521
Testpoints
DS26521 JTAG
DEFAULT
SETTING
3.3V
GND
Connected to
Host PC
—
—
Not Installed
—
—
—
—-
SCHEMATIC
PAGE
2
2
8
8
6
8
11
11
5
3
DESCRIPTION
System VDD. Always connected to power
supply.
System Ground. Always connected to power
supply.
Used for Communication with Host PC. Basic
setting is 57.6k baud, 8 bits, no stop bit, 1 parity
bit (57.6, 8, N, 1).
OnCE Debug Connector for MMC2107
Processor
System Reset. Connects to all device reset
pins.
Provides Flash Programming Voltage (5V) to
Processor
JTAG Connector for Lattice EC3 FPGA
FPGA Init and Done Pins
Testpoints for DS26521 Pins: RCHBLK_CLK,
RLF_LTC, AL_RSIGF, RM_RFSYNC,
TCHBLK_CLK
JTAG Connector for DS26521
YB01, YB02
(Bottom side of
Oscillators
—
5
Oscillators for 2.048MHz and 1.544MHz
PC Board)
J07, J10
J10.12 + J10.14
JP01
JP02
JP03
JP04
J02
JP05
JP06
JP07
JP08
JP09
JP10
J04, J08
JB02
Testpoints
Bus Tri-State
MCLK Selection
RSYSCLK
Selection
TSYSCLK
Selection
TCLK Selection
DS26521
Testpoints
SPI_CPOL bias
SPI_CPHA bias
SPI_SWAP bias
SPI_SEL bias
BTS bias
TXENABLE bias
Network BNC
Network RJ48
—
Not Jumpered
Jumpered
pins 2+3
Jumpered
Pins 1+2
Jumpered
Pins 1+2
Jumpered
Pins 1.2
—
Not Jumpered
Not Jumpered
Not Jumpered
Jumpered
Pins 1+2
Jumpered
Pins 2+3
Jumpered
Pins 2+3
—
—
10
10
5
5
5
5
5
3
3
3
3
3
3
4
4
Testpoints for DS26521 Address/Data Bus and
Control Lines
—
MCLK Selection: 1.544MHz, 2.048MHz (default)
RSYSCLK Selection: MCLK (default), BPCLK
TSYSCLK Selection: MCLK (default), BPCLK
TCLK Selection: RCLK (default), MCLK
Testpoints for DS26521 Pins: TSER, RSER,
TSSYNCIO, TSYNC, RSYNC, REFCLKIO,
MCLK, RSIG, TSIG
SPI_CPOL Selection: Pulldown, Pullup
SPI_CPHA Selection: Pulldown, Pullup
SPI_SWAP Selection: Pulldown, Pullup
SPI_SEL Selection: Pulldown (default), Pullup
BTS Selection: Pulldown, Pullup (default)
TXENABLE Selection: Pulldown, Pullup
(default)
BNC for 75 ? Network Connection
RJ48 Network Connection
6 of 18
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS26521L | 功能描述:网络控制器与处理器 IC 1-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS26521L+ | 功能描述:网络控制器与处理器 IC 1-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS26521LN | 功能描述:网络控制器与处理器 IC 1-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS26521LN+ | 功能描述:网络控制器与处理器 IC 1-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS26521N | 制造商:Maxim Integrated Products 功能描述:DS26521 MONOLITHIC T1E1J1 SCT IND - Rail/Tube |
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