参数资料
型号: DS2761AE+025/T&R
厂商: Maxim Integrated Products
文件页数: 6/24页
文件大小: 0K
描述: IC MON BATT LI-ION HP 16-TSSOP
标准包装: 1,000
功能: 电池监控器
电池化学: 锂离子(Li-Ion)
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
DS2761
POWER MODES
The DS2761 has two power modes: active and sleep. While in active mode, the DS2761 continually
measures current, voltage, and temperature to provide data to the host system and to support current
accumulation and Li+ safety monitoring. In sleep mode, the DS2761 ceases these activities. The DS2761
enters sleep mode when any of the following conditions occurs:
§ The PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than
2s (pack disconnection)
§ The voltage on V IN drops below undervoltage threshold V UV for t UVD (cell depletion)
§ The pack is disabled through the issuance of a SWAP command (SWEN bit = 1)
The DS2761 returns to active mode when any of the following occurs:
§ The PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high
(pack connection)
§
§
§
The PS pin is pulled low (power switch)
The voltage on PLS becomes greater than the voltage on V IN (charger connection) with the SWEN bit
set to 0
The pack is enabled through the issuance of a SWAP command (SWEN bit = 1)
The DS2761 defaults to sleep mode when power is first applied.
Li+ PROTECTION CIRCUITRY
During active mode, the DS2761 constantly monitors cell voltage and current to protect the battery from
overcharge (overvoltage), overdischarge (undervoltage), and excessive charge and discharge currents
(overcurrent, short circuit). Conditions and DS2761 responses are described in the sections below and
summarized in Table 2 and Figure 3.
Table 2. Li+ PROTECTION CONDITIONS AND DS2761 RESPONSES
CONDITION
NAME
ACTIVATION
THRESHOLD DELAY RESPONSE
RELEASE
THRESHOLD
V IS > V OC
Overvoltage
Undervoltage
Overcurrent, Charge
Overcurrent, Discharge
Short Circuit
V IN > V OV
V IN < V UV
(2)
V IS < -V OC(2)
V SNS > V SC
t OVD
t UVD
t OCD
t OCD
t SCD
CC high
CC , DC high,
Sleep Mode
CC , DC high
DC high
DC high
V IN < V CE , or
V IS ≤ -2mV
V PLS > V DD (1)
(charger connected)
V PLS < V DD - V TP (3)
V PLS > V DD - V TP (4)
V PLS > V DD - V TP (4)
V IS = V IS1 - V IS2 . Logic high = V PLS for CC and V DD for DC . All voltages are with respect to V SS . I SNS references current
delivered from pin SNS.
1) If V DD < 2.2V, release is delayed until the recovery charge current (I RC ) passed from PLS to V DD charges the battery and
allows V DD to exceed 2.2V.
2) For the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: I SNS > I OC for
charge direction and I SNS < -I OC for discharge direction
3) With test current I TST flowing from PLS to V SS (pulldown on PLS)
4) With test current I TST flowing from V DD to PLS (pullup on PLS)
Overvoltage. If the cell voltage on V IN exceeds the overvoltage threshold, V OV , for a period longer than
overvoltage delay, t OVD , the DS2761 shuts off the external charge FET and sets the OV flag in the
protection register. When the cell voltage falls below charge enable threshold V CE , the DS2761 turns the
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