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参数资料
| 型号： | DS2764AE+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/20页 |
| 文件大小： | 0K |
| 描述： | IC MON BATT LI-ION HP 16-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 96 |
| 功能： | 电池监控器 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 2.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
DS2764 High-Precision Li+ Battery Monitor With 2-Wire Interface
Bus Timing
The DS2764 is compatible with any bus timing up to 100kHz. No special configuration is required to operate at any
speed.
2-Wire Command Protocols
The command protocols involve several transaction formats. The simplest format consists of the master writing the
START bit, slave address, R/W bit, and then monitoring the acknowledge bit for presence of the DS2764. More
complex formats such as the Write Data, Read Data and Function command protocols write data, read data and
execute device specific operations. All bytes in each command format require the slave or host to return an
Acknowledge bit before continuing with the next byte. Each function command definition outlines the required
transaction format. The following key applies to the transaction formats.
Table 3. 2-Wire Protocol Key
KEY
S
SAddr
FCmd
MAddr
Data
A
N
DESCRIPTION
START bit
Slave Address (7-bit)
Function Command byte
Memory Address byte
Data byte written by master
Acknowledge bit - Master
No Acknowledge - Master
KEY
Sr
W
R
P
Data
A
N
DESCRIPTION
Repeated START
R/W bit = 0
R/W bit = 1
STOP bit
Data byte returned by slave
Acknowledge bit ? Slave
No Acknowledge ? Slave
Basic Transaction Formats
Write:
S SAddr W A MAddr A Data0 A P
A write transaction transfers one or more data bytes to the DS2764. The data transfer begins at the memory
address supplied in the MAddr byte. Control of the SDA signal is retained by the master throughout the
transaction, except for the Acknowledge cycles.
Read:
S SAddr W A MAddr A Sr SAddr R A Data0 N P
Write Portion
Read Portion
A read transaction transfers one or more bytes from the DS2764. Read transactions are composed of two parts, a
write portion followed by a read portion, and is therefore inherently longer than a write transaction. The write
portion communicates the starting point for the read operation. The read portion follows immediately, beginning
with a Repeated START, Slave Address with R/W set to a 1. Control of SDA is assumed by the DS2764 beginning
with the Slave Address Acknowledge cycle. Control of the SDA signal is retained by the DS2764 throughout the
transaction, except for the Acknowledge cycles. The master indicates the end of a read transaction by responding
to the last byte it requires with a No Acknowledge. This signals the DS2764 that control of SDA is to remain with
the master following the Acknowledge clock.
Write Data Protocol
The write data protocol is used to write to register and shadow RAM data to the DS2764 starting at memory
address MAddr. Data0 represents the data written to MAddr, Data1 represents the data written to MAddr + 1 and
DataN represents the last data byte, written to MAddr + N. The master indicates the end of a write transaction by
sending a STOP or Repeated START after receiving the last acknowledge bit.
S SAddr W A MAddr A Data0 A Data1 A … DataN A P
The msb of the data to be stored at address MAddr can be written immediately after the MAddr byte is
acknowledged. Because the address is automatically incremented after the least significant bit (lsb) of each byte is
received by the DS2764, the msb of the data at address MAddr + 1 is can be written immediately after the
acknowledgement of the data at address MAddr. If the bus master continues an auto-incremented write
transaction beyond address 4Fh, the DS2764 ignores the data.
Data is also ignored on writes to read-only
addresses and reserved addresses, locked EEPROM blocks as well as a write that auto increments to the Function
Command register (address FEh). Incomplete bytes and bytes that are Not Acknowledged by the DS2764 are not
written to memory. As noted in the Memory Section, writes to unlocked EEPROM blocks modify the shadow RAM
only.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2764AE/R | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:High-Precision Li+ Battery Monitor with 2-Wire Interface |
| DS2764AE/T | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:High-Precision Li+ Battery Monitor with 2-Wire Interface |
| DS2764AE/T&R | 制造商:Maxim Integrated Products 功能描述:LI+BATT MNTR2WIRE 4.275OV16P TSSOP - Tape and Reel |
| DS2764AE/T&R | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:High-Precision Li+ Battery Monitor with 2-Wire Interface |
| DS2764AE+ | 功能描述:电池管理 Ic Mon Batt Li-Ion Hp RoHS:否 制造商:Texas Instruments 电池类型:Li-Ion 输出电压:5 V 输出电流:4.5 A 工作电源电压:3.9 V to 17 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:VQFN-24 封装:Reel |
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