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| 型号： | DS3150QN |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 8/28页 |
| 文件大小： | 0K |
| 描述： | IC LIU T3/E3/STS-1 IND 28-PLCC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 37 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 1/1 |
| 规程： | DS3 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-LCC（J 形引线） |
| 供应商设备封装： | 28-PLCC（11.51x11.51） |
| 包装： | 管件 |
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DS3150
16 of 28
1.4 Jitter Attenuator
The DS3150 contains an on-board jitter attenuator (JA) that can be placed in the receive path or in the
transmit path or disabled. This selection is made using the RMON and
TTS input pins. See Table 2-C for
selection details. Figure 1-8 shows the minimum jitter attenuation for the device when the JA is enabled.
Figure 1-8 also shows the jitter transfer of the receiver when the JA is disabled.
The jitter attenuator consists of a narrowband PLL to retime the selected clock, a 16 x 2-bit FIFO to
buffer the associated data while the clock is being retimed, and logic to prevent over/underflow of the
FIFO in the presence of very large jitter amplitudes.
The jitter attenuator requires a transmission-quality master clock (i.e.,
±20ppm frequency accuracy and
low jitter). When enabled in the receive path, the JA can obtain its master clock from the MCLK pin or
the TCLK pin. If the signal on the MCLK pin is toggling, the JA uses the signal on MCLK as its master
clock. If MCLK is high or floating, the JA uses the signal on the TCLK pin as its master clock. When
enabled in the transmit path, the JA must take its master clock from the MCLK pin. The selected master
clock is also used by the clock and data recovery block.
The JA has a loop bandwidth of master_clock / 2058874 (see corner frequencies in Figure 1-8). The JA
attenuates jitter at frequencies higher than the loop bandwidth while allowing jitter (and wander) at lower
frequencies to pass through relatively unaffected.
Figure 1-8. Jitter Attenuation and Jitter Transfer
10
100
1k
10k
100k
1M
21.7Hz (DS3)
16.7Hz (E3)
25.2Hz (STS-1)
1k
-30
-20
-10
E3 [TBR24 (1997)]
Frequency (Hz)
Jitter
Attenuation
(dB)
0
DS3 [GR-499 (1995)]
Category I
DS3150
Typical
Receiver Jitter
Transfer with
Jitter Attenuator
Disabled
>150k
DS3150
DS3 / E3 / STS-1
Minimum Jitter
Attenuation with
Jitter Attenuator
Enabled
40Hz
DS3 [GR-253 (1999)]
Category I
27Hz
STS-1
[GR-253 (1999)]
Category II
40k 59.6k
DS3 [GR-499 (1999)]
Category II
NOTE: JITTER ATTENUATION AND JITTER TRANSFER ARE NOT TESTED DURING PRODUCTION TEST.
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相关代理商/技术参数 |
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|---|---|
| DS3150QN+ | 功能描述:网络控制器与处理器 IC 3.3V DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3150QNB4TR | 功能描述:网络控制器与处理器 IC 3.3V DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3150QNC1 | 功能描述:网络控制器与处理器 IC 3.3V DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3150QNC1/T&R | 制造商:Maxim Integrated Products 功能描述:T3/E3/STS-1 LIU 28P PLCC IND T&R C1 - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC LIU 3.3V DS3/E3/STS-1 28PLCC 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs 3.3V DS3/E3/STS-1 Line Interface Unit |
| DS3150QNC1/T&R | 功能描述:网络控制器与处理器 IC 3.3V DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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