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| 型号： | DS3252N+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 4/71页 |
| 文件大小： | 0K |
| 描述： | IC LIU DS3/E3/STS-1 144CSBGA |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 160 |
| 应用： | 带放大器的多路复用器 |
| 接口： | SPI |
| 电源电压： | 3.135 V ~ 3.465 V |
| 封装/外壳： | 144-BGA，CSPBGA |
| 供应商设备封装： | 144-TECSBGA（13x13） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
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DS3251/DS3252/DS3253/DS3254
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Table 6-D. Hardware Mode Pin Descriptions
Note: These pins are active in hardware mode.
NAME
FUNCTION
E3Mn
I
E3 Mode Enable
0 = DS3 operation
1 = E3 or STS-1 operation
STSn
I
STS-1 Mode Enable
When E3M = 1,
0 = E3 operation
1 = STS-1 operation
When E3M = 0, STS selects the DS3 AIS pattern. See Table 6-G.
LLBn,
RLBn
I
Local Loopback Select, Remote Loopback Select
{LLB, RLB} =
00 = no loopback
01 = remote loopback
10 = analog local loopback
11 = digital local loopback
RBIN
I
Receiver Binary Framer-Interface Enable
0 = Receiver framer interface is bipolar on the RPOS and RNEG pins. The B3ZS/HDB3 decoder is
disabled.
1 = Receiver framer interface is binary on the RDAT pin with the RLCV pin indicating line-code
violations. The B3ZS/HDB3 encoder is enabled.
RCINV
I
Receiver Clock Invert
0 = RPOS/RDAT and RNEG/RLCV update on the falling edge of RCLK.
1 = RPOS/RDAT and RNEG/RLCV update on the rising edge of RCLK.
RJAn
I
Receiver Jitter Attenuator Enable
0 = remove jitter attenuator from the receiver path
1 = insert jitter attenuator into the receiver path
See Table 6-I for more information.
RMONn
I
Receive Monitor-Preamp Enable. RMON determines whether or not the receiver’s preamp is enabled
to provide flat gain to the incoming signal before the AGC/equalizer block processes it. This feature
should be enabled when the device is being used to monitor signals that have been resistively
attenuated by a monitor jack. See Section 8.2 for more information.
0 = disable the monitor preamp
1 = enable the monitor preamp
TBIN
I
Transmitter Binary Framer-Interface Enable
0 = Transmitter framer interface is bipolar on the TPOS and TNEG pins. The B3ZS/HDB3 encoder is
disabled.
1 = Transmitter framer interface is binary on the TDAT pin. (TNEG is ignored and should be wired low.)
The B3ZS/HDB3 encoder is enabled.
TCINV
I
Transmitter Clock Invert
0 = TPOS/TDAT and TNEG are sampled on the rising edge of TCLK.
1 = TPOS/TDAT and TNEG are sampled on the falling edge of TCLK.
TDSAn,
TDSBn
I
Transmitter Data Select. These inputs select the source of the transmit data. See Table 6-G for
details.
TJAn
I
Transmitter Jitter Attenuator Enable
0 = remove jitter attenuator from the transmitter path
1 = insert jitter attenuator into the transmitter path
See Table 6-I for more information.
TLBOn
I
Transmitter Line Build-Out Enable. TLBO indicates cable length for waveform shaping in DS3 and
STS-1 modes. TLBO is ignored for E3 mode and should be wired high or low.
0 = cable length
≥ 225ft
1 = cable length < 225ft
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS3252N+ | 功能描述:网络控制器与处理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3252NA3 | 制造商:Maxim Integrated Products 功能描述:DS3252N REV A3 - Rail/Tube |
| DS3253 | 功能描述:网络控制器与处理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3253+ | 功能描述:网络控制器与处理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS3253A3 | 功能描述:网络控制器与处理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
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