参数资料
型号: DS33M31N+
厂商: Maxim Integrated Products
文件页数: 20/21页
文件大小: 0K
描述: IC MAPPER ETHERNET 256CSBGA
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 90
应用: 数据传输
接口: SPI
电源电压: 1.8V,2.5V,3.3V
封装/外壳: 256-BGA,CSBGA
供应商设备封装: 256-CSBGA(17x17)
包装: 托盘
安装类型: 表面贴装
DS33M30/M31/M33 DATA SHEET
Rev: 010809
8 of 21
1.3.3 STS-3c/AU-4 Pointer Processing
1.3.3.1 STS-3c/AU-4 Pointer Generation
AU-4 pointer generation using the associated Add STS-3/STM-1 clock
Pointer generation of outgoing pointer values (H1/H2) per ITU G.707 specifications
Generation of AU-4 pointer bytes (H1, H2, and H3) and insertion of the VC-4 POH
User-configurable automatic or manual generation of AIS-P
Generation of an unequipped indication (“all zero” path (payload data and POH) with valid J1, B3, and G1)
Comprehensive software programmable pointer (H1, H2) diagnostics
1.3.3.2 STS-3c/AU-4 Pointer Interpretation
AU-4 pointer interpretation using the Drop STS-3/STM-1 clock
Pointer interpretation per ITU G.707 specifications
Extraction of AU-4 pointer bytes (H1, H2, and H3) and the VC-4 POH
Detection of alarm defects including LOP and “all ones” pointer (AIS-P)
Detection and accumulation of incoming pointer increments, decrements, changes, and new pointers
1.3.4 STS-3c SPE/VC-4 Path Termination
1.3.4.1 STS-3c SPE/VC-4 Path Overhead Generation
Generation of all POH bytes including Path trace ID (J1), Path BIP-8 (B3), Path signal label (C2), Path
status (G1), Path user byte (F2), Path concatenation indicator (H4), and Path growth (Z3, Z4, and Z5)
All POH bytes can be inserted from either the VC-4 POH input port or software accessible internal registers
User configurable automatic or manual generation of PTE defects including RDI-P and ERDI-P
Programmable error insertion of B3 and REI errors
Insertion of HDLC data stream into path user byte (F2)
Insertion of path trace ID into path trace byte (J1)
1.3.4.2 STS-3c SPE/VC-4 Path Overhead Reception and Monitoring
Monitoring of all POH bytes including Path trace ID (J1), Path BIP-8 (B3), Path signal label (C2), Path
status (G1), Path user byte (F2), Path concatenation indicator (H4), and Path growth (Z3, Z4, and Z5)
All POH bytes are presented to the VC-4 POH output port and software accessible internal registers
PTE defect detection: PLM-P, PLU-P, UNEQ-P, PDI-P, RDI-P, and Enhanced RDI-P (ERDI-P)
Detection and accumulation of Path BIP-8 (B3) errors and Path REI errors (part of G1) on a bit or block
basis
Two POH B3 bit-error rate (BER) measurement circuits with separate software programmable detection
and clearing thresholds
Extraction of HDLC data stream from path user byte (F2)
Extraction of path trace ID from path trace byte (J1)
1.3.4.3 STS-3c SPE/VC-4 Payload Mapper/Demapper
Mapping of Ethernet traffic into/out of VC-4 payload (C-4).
1.3.5 STS-3 Mux/Demux (DS33M31 and DS33M33 Only)
1.3.5.1 STS-3 Mux
Multiplexing of three TU-3 data streams (or ports) into a C-4 per ITU G.707
Multiplexing of three STS-1/AU-3 data streams (or ports) into an STS-3/STM-1 per ITU G.707 and
Telcordia GR-253
1.3.5.2 STS-3 DeMux
Demultiplexing of three TU-3 data streams (or ports) from a C-4 per ITU G.707
Demultiplexing of three STS-1/AU-3 data streams (or ports) from an STS-3/STM-1 per ITU G.707 and
Telcordia GR-253
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