参数资料
型号: DS3911T+T
厂商: Maxim Integrated Products
文件页数: 2/24页
文件大小: 0K
描述: IC DAC 10BIT I2C QUAD 14TDFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 10
数据接口: I²C,串行
转换器数目: 4
电压电源: 单电源
功率耗散(最大): 1.74W
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-TDFN-EP(3x5)
包装: 带卷 (TR)
输出数目和类型: 4 电压,单极
采样率(每秒): *
DS3911
Temperature-Controlled, Nonvolatile,
I2C Quad DAC
10
Maxim Integrated
memory locations by dropping TINDEX[7] and forcing
it high. When AEN = 0, any address between 80h and
FFh can be addressed. To get known results in the DAC
VALUE register, TINDEX should be kept between 80h
and AFh.
The device monitors the internal temperature by repeat-
edly polling the temperature sensor’s result at a rate of
tFRAME. Each cycle, for the DAC whose corresponding
EN bit is set, the device reads the internal temperature
once, and, based on that temperature, calculates the
TINDEX register. The TINDEX value corresponds directly
to the LUT memory address for the given temperature
ranges. The DAC OFFSET address is calculated based
on the TINDEX value so only one pointer is necessary.
These two locations provide the values that eventually
become the 10-bit DAC input, DAC VALUE. This data
that gets loaded into the DAC VALUE register is a math
function of the temperature-indexed LUT value and the
temperature-indexed OFFSET value, as follows:
DAC[9:0] = LUT Setting + 4 x OFFSET Setting
where the DAC[9:0] DAC control value is left-justified in
the 16-bit DAC VALUE register.
DAC VALUE[15:0] = DAC[9:0] x 64
Example Calculation for DAC1:
Assumptions:
1) Temperature is 43NC.
2) DAC1 OFFSET index associated with 43NC is memory
table location FCh and contains data = 2Ah.
3) DAC1 LUT index associated with 43NC is memory
table location 94h and contains data = 7Bh.
DAC1 = 7Bh + 4 x 2Ah = 123h = 291
DAC1 VALUE = 291 x 64
Note: Loss of information occurs if the result of the DAC
VALUE math function described above is greater than
10 bits. It is important to set the DAC VALUE and DAC
OFFSET values to ensure this overflow does not occur.
The eight DAC OFFSET registers can be independently
set to achieve any desired temperature coefficient
(tempco) on its associated DAC. Figure 4 demonstrates
Figure 4. DAC OFFSET LUT Examples
DAC OFFSET LUTs
EIGHT REGISTERS PER DAC
0
255
511
DELTA-SIGMA
DACs
767
1023
EACH OFFSET REGISTER CAN BE INDEPENDENTLY SET BETWEEN
0 AND 1020. 1020 = 4 x FFh. THIS EXAMPLE ILLUSTRATES POSITIVE
AND NEGATVE TEMPCO.
DAC
LUT
BITS
7:0
F8h
DAC
LUT
BITS
7:0
F9h
DAC
LUT
BITS
7:0
FAh
DAC
LUT
BITS
7:0
FBh
DAC
LUT
BITS
7:0
FCh
DAC
LUT
BITS
7:0
FDh
DAC
LUT
BITS
7:0
FEh
DAC
LUT
BITS
7:0
FFh
0
255
511
-40°C
-8°C
+8°C
+24°C +40°C +56°C +70°C +88°C +104°C
DELTA-SIGMA
DACs
767
1023
EACH OFFSET REGISTER CAN BE INDEPENDENTLY
SET BETWEEN 0 AND 1020. 1020 = 4 x FFh. THIS
EXAMPLE ILLUSTRATES POSITIVE TEMPCO.
DAC
LUT
BITS
7:0
F8h
DAC
LUT
BITS
7:0
F9h
DAC
LUT
BITS
7:0
FAh
DAC
LUT
BITS
7:0
FBh
DAC
LUT
BITS
7:0
FCh
DAC
LUT
BITS
7:0
FDh
DAC
LUT
BITS
7:0
FEh
DAC
LUT
BITS
7:0
FFh
DAC OFFSET LUTs
EIGHT REGISTERS PER DAC
-40°C
-8°C
+8°C
+24°C +40°C +56°C +70°C +88°C +104°C
OFFSET MEMORY
LOCATIONS FOR
THE GIVEN
TEMPERATURE
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