参数资料
型号: DS4026S+QCN
厂商: Maxim Integrated Products
文件页数: 4/14页
文件大小: 0K
描述: IC OSC TCXO 51.84MHZ 16-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 45
类型: 温度 - 补偿晶体振荡器(TCXO)
频率: 51.84MHz
电源电压: 3.135 V ~ 3.465 V
电流 - 电源: 1.5mA
工作温度: -40°C ~ 85°C
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
包装: 管件
供应商设备封装: 16-SOIC W
安装类型: 表面贴装
产品目录页面: 1434 (CN2011-ZH PDF)
DS4026
10MHz to 51.84MHz TCXO
12
______________________________________________________________________________________
The DS4026 can operate in the following two modes:
Slave receiver mode (write mode): Serial data and
clock are received through SDA and SCL. After each
byte is received, an acknowledge bit is transmitted.
START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address
recognition is performed by hardware after reception
of the slave address and direction bit. The slave
address byte is the first byte received after the mas-
ter generates a START condition. The slave address
byte contains the 7-bit DS4026 address, which is
1000001, followed by the direction bit (R/W), which is
0 for a write. After receiving and decoding the slave
address byte, the DS4026 outputs an acknowledge
on SDA. After the DS4026 acknowledges the slave
address and write bit, the master transmits a word
address to the DS4026. This sets the register pointer
on the DS4026, with the DS4026 acknowledging the
transfer. The master can then transmit zero or more
bytes of data, with the DS4026 acknowledging each
byte received. The register pointer increments after
each data byte is transferred. The master generates
a STOP condition to terminate the data write.
Slave transmitter mode (read mode): The first byte
is received and handled as in the slave receiver
mode. However, in this mode, the direction bit indi-
cates that the transfer direction is reversed. Serial
data is transmitted on SDA by the DS4026 while the
serial clock is input on SCL. START and STOP condi-
tions are recognized as the beginning and end of a
serial transfer. Address recognition is performed by
hardware after reception of the slave address and
direction bit. The slave address byte is the first byte
received after the master generates a START condi-
tion. The slave address byte contains the 7-bit
DS4026 address, which is 1000001, followed by the
direction bit (R/W), which is 1 for a read. After receiv-
ing and decoding the slave address byte, the
DS4026 outputs an acknowledge on SDA. The
DS4026 then begins to transmit data starting with the
register address pointed to by the register pointer. If
the register pointer is not written to before the initia-
tion of a read mode, the first address that is read is
the last one stored in the register pointer. The
DS4026 must receive a not acknowledge to end a
read.
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