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参数资料
| 型号： | DS5002FPM-16 |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/25页 |
| 文件大小： | 0K |
| 描述： | IC MPU SECURE 16MHZ 80-TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 66 |
| 系列： | DS500x |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 16MHz |
| 连通性： | EBI/EMI，SIO，UART/USART |
| 外围设备： | 电源故障复位，WDT |
| 输入/输出数： | 32 |
| 程序存储器类型： | SRAM |
| RAM 容量： | 128 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振荡器型： | 外部 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 80-BQFP |
| 包装： | 托盘 |
DS5002FP Secure Microprocessor Chip
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protection measure, the address encryptor also generates “dummy” read access cycles whenever time is available
during program execution.
DUMMY READ CYCLES
Like the DS5000FP, the DS5002FP generates a “dummy” read access cycle to non-sequential addresses in
external RAM memory whenever time is available during program execution. This action has the affect of further
complicating the task of determining the normal flow of program execution. During these pseudorandom dummy
cycles, the RAM is read to all appearances, but the data is not used internally. Through the use of a repeatable
exchange of dummy and true read cycles, it is impossible to distinguish a dummy cycle from a real one.
ENCRYPTION ALGORITHM
The DS5002FP incorporates a proprietary algorithm implemented in hardware, which performs the scrambling of
address and data on the byte-wide bus to the SRAM. This algorithm has been greatly strengthened with respect to
its DS5000FP predecessor. Improvements include:
1) 64-bit encryption key
2) Incorporation of DES-like operations to provide a greater degree of nonlinearity
3) Customizable encryption
The encryption circuitry uses a 64-bit key value (compared to the DS5000FP’s 40-bit key), which is stored on the
DS5002FP die and protected by the Security Lock function described below. In addition, the algorithm has been
strengthened to incorporate certain operations used in DES encryption, so that the encryption of both the
addresses and data is highly nonlinear. Unlike the DS5000FP, the encryption circuitry in the DS5002FP is always
enabled.
Dallas Semiconductor can customize the encryption circuitry by laser programming the die to insure that a unique
encryption algorithm is delivered to the customer. In addition, the customer-specific version can be branded as
specified by the customer. Please contact Dallas Semiconductor for ordering information of customer-specific
versions.
ENCRYPTION KEY
As described above, the on-chip 64-bit encryption key is the basis of both the address and data encryptor circuits.
The DS5002FP provides a key management system, which is greatly improved over the DS5000FP. The
DS5002FP does not give the user the ability to select a key. Instead, when the loader is given certain commands,
the key is set based on the value read from an on-chip hardware random number generator. This action is
performed just prior to actually loading the code into the external RAM. This scheme prevents characterization of
the encryption algorithm by continuously loading new, known keys. It also frees the user from the burden of
protecting the key selection process.
The random number generator circuit uses the asynchronous frequency differences of two internal ring oscillator
and the processor master clock (determined by XTAL1 and XTAL2). As a result, a true random number is
produced.
VECTOR RAM
A 48-byte vector RAM area is incorporated on-chip, and is used to contain the reset and interrupt vector code in the
DS5002FP. It is included in the architecture to help insure the security of the application program.
If reset and interrupt vector locations were accessed from the external nonvolatile program/data RAM during the
execution of the program, then it would be possible to determine the encrypted value of known addresses. This
could be done by forcing an interrupt or reset condition and observing the resulting addresses on the byte-wide
address/data bus. For example, it is known that when a hardware reset is applied the logical program address is
forced to location 0000H and code is executed starting from this location. It would then be possible to determine
the encrypted value (or physical address) of the logical address value 0000H by observing the address presented
to the external RAM following a hardware reset. Interrupt vector address relationships could be determined in a
similar fashion. By using the on-chip vector RAM to contain the interrupt and reset vectors, it is impossible to
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS5002FPM-16+ | 功能描述:微处理器 - MPU Soft MCU Chip RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| DS5002FPN08 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microcontroller |
| DS5002FPN12 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microcontroller |
| DS5002FPN16 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microcontroller |
| DS5003 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Secure Microprocessor Chip |
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