参数资料
型号: DS75LVS+
厂商: Maxim Integrated
文件页数: 10/13页
文件大小: 275K
描述: IC SENSOR TEMP DIGITAL 8SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 100
功能: 温度计,恒温计
传感器类型: 内部
感应温度: -55°C ~ 125°C
精确度: ±3°C(最小值)
拓扑: ADC(三角积分型),比较器,寄存器库
输出类型: I²C?/SMBus?
输出警报:
输出风扇:
电源电压: 1.7 V ~ 3.7 V
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 1435 (CN2011-ZH PDF)
DS75LV: Digital Thermometer and Thermostat
Address Byte:  The  control  byte  is  transmitted  by  the  master  and  consists  of  the  7-bit  slave  address  plus  a 
read/write (R/W) bit (see Figure 7). If the master is going to read data from the slave device then R/W = 1, and if
the master is going to write data to the slave device then R/W = 0.
Pointer Byte: The pointer byte is used by the master to tell the DS75LV which register is going to be accessed 
during communication. The six MSbs of the pointer byte (see Figure 8) are always 0 and the two LSbs correspond
to the desired register as shown in Table 6.  
 
Figure 6. Start, Stop, and ACK Signals
 
 
 
 
 
 
 
 
 
 
Figure 7. Address Byte 
bit 7     bit 6     bit 5     bit 4     bit 3     bit 2     bit 1     bit 0
1
0
0
1
A
2
 
A
1
 
A
0
 
R/W
 
Figure 8. Pointer Byte 
bit 7     bit 6     bit 5     bit 4     bit 3     bit 2     bit 1     bit 0 
0
0
0
0
0
0
P1
P0
 
SCL
SDA
START
Condition
STOP
Condition
ACK (or NACK)
From Receiver
GENERAL 2-WIRE INFORMATION  
 All data is transmitted MSb first over the 2-wire bus.
 One bit of data is transmitted on the 2-wire bus each SCL period.
 A pullup resistor is required on the SDA line and, when the bus is idle, both SDA and SCL must remain in a logic-
high state.
 All bus communication must be initiated with a START condition and terminated with a STOP condition. During a
START or STOP is the only time SDA is allowed to change states while SCL is high. At all other times, changes
on the SDA line can only occur when SCL is low: SDA must remain stable when SCL is high.
 After every 8-bit (1-byte) transfer, the receiving device must answer with an ACK (or NACK), which takes one
SCL period. Therefore, nine clocks are required for every one-byte data transfer.
 
Writing to the DS75LV To write to the DS75LV, the master must generate a START followed by an address 
byte containing the DS75LV bus address. The value of the R/W bit must be a 0, which indicates that a write is
about to take place. The DS75LV will respond with an ACK after receiving the address byte. The master then
sends a pointer byte which tells the DS75LV which register is being written to. The DS75LV will again respond with
an ACK after receiving the pointer byte. Following this ACK the master device must immediately begin transmitting
data to the DS75LV. When writing to the configuration register, the master must send one byte of data (see Figure
9b), and when writing to the T
OS
 or T
HYST
 registers the master must send two bytes of data (see Figure 9c). After
receiving each data byte, the DS75LV will respond with an ACK, and the transaction is finished with a STOP from
the master.
 
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