参数资料
型号: DS87C520-QNL+
厂商: Maxim Integrated Products
文件页数: 17/43页
文件大小: 0K
描述: IC MCU EPROM/ROM 33MH IND 44PLCC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 26
系列: 87C
核心处理器: 8051
芯体尺寸: 8-位
速度: 33MHz
连通性: EBI/EMI,SIO,UART/USART
外围设备: 电源故障复位,WDT
输入/输出数: 32
程序存储器容量: 16KB(16K x 8)
程序存储器类型: OTP
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LCC(J 形引线)
包装: 管件
产品目录页面: 703 (CN2011-ZH PDF)
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
24 of 43
will set an interrupt flag. Regardless of whether the user enables this interrupt, there are then 512 clocks
left until the reset flag is set. Software can enable the interrupt and reset individually. Note that the
Watchdog is a free running timer and does not require an enable.
There are 5 control bits in special function registers that affect the Watchdog Timer and two status flags
that report to the user. WDIF (WDCON.3) is the interrupt flag that is set at timer termination when there
are 512 clocks remaining until the reset flag is set. WTRF (WDCON.2) is the flag that is set when the
timer has completely timed out. This flag is normally associated with a CPU reset and allows software to
determine the reset source.
EWT (WDCON.1) is the enable for the Watchdog timer reset function. RWT (WDCON.0) is the bit that
software uses to restart the Watchdog Timer. Setting this bit restarts the timer for another full interval.
Application software must set this bit before the timeout. Both of these bits are protected by Timed
Access. As mentioned previously, WD1 and 0 (CKCON .7 and 6) select the timeout. The Reset
Watchdog Timer bit (WDCON.0) should be asserted prior to modifying the Watchdog Timer Mode
Select bits (WD1, WD0) to avoid corruption of the watchdog count. Finally, the user can enable the
Watchdog Interrupt using EWDI (EIE.4). The Special Function Register map is shown above.
INTERRUPTS
The DS87C520/DS83C520 provide 13 interrupt sources with three priority levels. The Power-Fail
Interrupt (PFI) has the highest priority. Software can assign high or low priority to other sources. All
interrupts that are new to the 8051 family, except for the PFI, have a lower natural priority than the
originals.
Table 8. Interrupt Sources and Priorities
NAME
FUNCTION
VECTOR
NATURAL
PRIORITY
8051/DALLAS
PFI
Power-Fail Interrupt
33h
1
DALLAS
INT0
External Interrupt 0
03h
2
8051
TF0
Timer 0
0Bh
3
8051
INT1
External Interrupt 1
13h
4
8051
TF1
Timer 1
1Bh
5
8051
SCON0
TI0 or RI0 from serial port 0
23h
6
8051
TF2
Timer 2
2Bh
7
8051
SCON1
TI1 or RI1 from serial port 1
3Bh
8
DALLAS
INT2
External Interrupt 2
43h
9
DALLAS
INT3
External Interrupt 3
4Bh
10
DALLAS
INT4
External Interrupt 4
53h
11
DALLAS
INT5
External Interrupt 5
5Bh
12
DALLAS
WDTI
Watchdog Timeout Interrupt
63h
13
DALLAS
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