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| 型号： | DS89C450-QNL+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/46页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 64KB 33MHZ 44-PLCC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 26 |
| 系列： | 89C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 33MHz |
| 连通性： | EBI/EMI，SIO，UART/USART |
| 外围设备： | 电源故障复位，WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 1K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 产品目录页面： | 703 (CN2011-ZH PDF) |
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DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers
24 of 46
Table 4. In-Application Programming Commands
FC3:FC0
COMMAND
OPERATION
0000
Read Mode
Default state. All flash blocks are in read mode.
Note: The upper bank
of flash memory is inaccessible for execution unless the FC3:0 bits are
in the read mode (0000b) state.
0001
Verify Option Control Register
Read data from the option control register. Data is available in the
FDATA at the end of the following machine cycle. FDATA.3 is the logic
value of the watchdog POR default setting.
0010
Verify Security Block
Read a byte of data from the security block. After the address byte is
written to the FDATA, data is available in the FDATA at the end of the
following machine cycle. (Lock bits are addressed at 40h and
FDATA.5:3 are the logic value of LB1, LB2 and LB3, respectively.)
0011
Verify Upper Program
Memory Bank
Read a byte of data from upper flash memory bank (address range
from 2000h to 3FFFh). The first and second byte writes to the FDATA
are the upper and lower byte of the address. Data is available in the
FDATA at the end of the following machine cycle after the second
address byte is written.
0100
Reserved for Future Use
This command should not be modified by user programs.
1000
Reserved for Future Use
This command should not be modified by user programs.
1001
Write Option Control Register
Write to the option control register as data is written to FDATA. Bit 3 of
the data byte represents the watchdog POR default setting.
1010
Write Security Block
Write a byte of data to the security block at a selected locations
addressed by the first byte write to the FDATA. The second write to the
FDATA is the data byte. (Lock bits are addressed at 40h and the
FDATA 5:3 represents lock bits LB3, LB2, and LB1, respectively.)
1011
Write Upper Program
Memory Bank
Write a byte of code to the upper flash memory bank (address range
from 2000h to 3FFFh). The first and second byte writes to the FDATA
are the upper byte and the lower byte of the address. The third write to
the FDATA is the data byte.
1100
Erase Option Control Register
Erase the option control register. The contents of this register are
returned to FFh. This operation disables the watchdog reset function on
power-up.
1101
Erase Security Block
Erase the security flash block that contains the 64-byte encryption array
and the lock bits. The content of every memory location is turned into
FFh.
1110
Erase Upper Program
Memory Bank
Erase the upper bank of flash memory bank. The contents of every
memory location are returned to FFh.
1111
System Reset
This command is used to cause a system reset.
The flash command bits are cleared to 0 on all forms of reset, and it is important for the user software to clear
these bits to 0 to return the flash memory to read mode from erase/program operation. This setting is a “no
operation” condition for the MMU, which allows the processor to return to its normal execution. Note that the busy
and error flags have no function in normal flash-read mode.
The FCNTL SFR can only be written using timed access. This procedure provides protection against inadvertent
erase/program operation on the flash memory. Any command written to the FCNTL during a flash operation is
ignored (FBUSY = 0). To ensure data integrity, an erase command sequence should be reinitiated if an erase or
program operation is interrupted by a reset.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS89C450-QNL+ | 功能描述:8位微控制器 -MCU Ultra-High-Speed Flash MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| DS89LV21TM | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Transceiver |
| DS89LV21TN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Transceiver |
| DS8T26A | 制造商:NSC 制造商全称:National Semiconductor 功能描述:4-Bit Bidirectional Bus Transceivers |
| DS8T26AJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:4-Bit Bus Transceiver |
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