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| 型号： | DSC-11520-393 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | DIGITAL TO SYNCHRO OR RESOLVER, DMA36 |
| 封装： | 0.780 X 1.900 INCH, 0.210 INCH HEIGHT, DOUBLE WIDTH, KOVAR, DIP-36 |
| 文件页数： | 3/8页 |
| 文件大小： | 159K |
| 代理商： | DSC-11520-393 |
3
Data Device Corporation
www.ddc-web.com
DSC-11520
L-05/05-0
TABLE 1. DSC-11520 SPECIFICATIONS
Apply over temperature range, power supply ranges, reference voltage
and frequency range and 10% harmonic distortion in the reference.
PARAMETER
VALUE
RESOLUTION
16 bits
ACCURACY AND
DYNAMICS
Output Accuracy
Differential Linearity
Output Settling Time
±8 minutes to ±1 min. (See Ordering Info.)
±1 LSB max
Less than 20 sec for any digital step change.
DIGITAL INPUT
Logic Type
Logic Voltage Level VL
Load Current
Natural binary angle parallel positive logic CMOS and
TTL compatible.
Inputs are CMOS transient protected. Each input has
a 20 A max pull down to GND.
V = +4.5 V to +15 V supply
Logic 0 = 0 to +0.25 VL
Logic 1 = 0.4 VL to VL
20 A max to GND (bit 1-16)
20 A to VL (LL, LM, LA) See Timing Diagram
(FIGURE 2)
REFERENCE INPUT
Type
Frequency Range
Voltage
Input Impedance
Single Ended
Differential
Two differential solid-state inputs, one for standard
26 V input and one programmable.
DC to 1000 Hz
Standard Input
Programmable input
26 V ±10%
1.3 V min for full output;
higher voltages are scaled by
adding two series resistors
100 k
± 0.5%
5 k
± 0.5%
200 k
± 0.5%
10 k
± 0.5%
ANALOG OUTPUT
Type
Output current
Max Output Voltage (Tracks
Reference Input Voltage)
Transformation Ratio Tol.
Scale Factor Variation
DC Offset Each Line to
GND
Pin programmable for synchro or resolver mode.
2 mA rms max.
11.8 V rms L-L ±0.25%nominal in synchro mode
6.81 V rms L-L ±0.25%nominal resolver mode
±0.5% max
±0.1% max
±15 mV standard, varies with input angle
±5 mV available- Consult Factory
POWER SUPPLIES
Voltage
Voltage Limits
Max Voltage Without
Damage
Current or impedance
+15 V
-15 V
±5%
+18 V
-18 V
20 mA max
No VL required; +5 V logic levels are derived
internally.
TEMPERATURE RANGES
(CASE)
Operating
-1 Option
-3 Option
Storage
-55°C to +125°C
0°C to +70°C
-55°C to 135°C
PHYSICAL
CHARACTERISTICS
Type
Size
Weight
36-pin double DIP
0.78 X 1.9 X 0.21inch (2.0 X 4.8 X 0.53 cm)
0.85 oz (24g)
INTRODUCTION
As shown in the block diagram, the signal conversion in the DSC-
11520 is performed by a high accuracy Digital-to-Resolver con-
verter whose SIN and COS outputs have a low scale factor vari-
ation as a function of the digital input angle. This resolver output
is either amplified by scaling amplifiers for resolver output, or is
both amplified and converted to a synchro output by an elec-
tronic Scott-T. In both cases, the output line currents are limited
to 2 mA rms max, which is sufficient for driving S/D converters,
solid-state control transformers, and displays. Output power
amplifiers will be required, however, for driving electro-mechani-
cal devices such as synchros and resolvers.
The reference conditioner has a differential input with high AC
and DC common-mode rejection, so that a reference isolation
transformer will seldom be required. There are two sets of refer-
ence inputs. The RH, RL input provides the maximum synchro or
resolver output voltage for a standard 26 V rms reference input.
The RH', RL' input is used to scale the output for other reference
voltage levels. Series resistors can be added to the reference
input as described below either to accommodate lower reference
levels for full output, or to reduce the output level.
The reference conditioner output -R is intended for test purpos-
es. A signal between 6 V and 7.5 V at -R indicates that a refer-
ence input signal is present.
POWER SUPPLY CYCLING
Power supply cycling of the DDC converter should follow the
guidelines below to avoid any potential problems. Strictly main-
tain proper sequencing of supplies and signals per typical CMOS
circuit guidelines:
- Apply power supplies first (+15, -15V and ground).
- Apply digital control signals next.
- Apply analog signals last.
The reverse sequence should be followed during power down
of the circuit.
OUTPUT SCALING AND REF. LEVEL ADJUSTMENT
The DSC-11520 operates like a multiplying D/A converter in that
the voltage of each output line is directly proportional to the ref-
erence voltage.
The maximum line-to-line levels are determined by the output
amplifiers and are nominally 11.8 V for synchro output and 6.81
V for resolver output.The RH, RL reference input is designed to
provide this nominal output for the standard 26 V reference level.
The scaling adjustment is made by two internal 100 k
resistors
in series with the reference conditioner input (see DSC-11520
Block Diagram). The maximum output levels without distortion
are 10% greater than the nominal 11.8 V and 6.81 V levels.
The RH', RL' reference input has only 5 k
internal resistors in
series with the reference conditioner input, so that nominal line-
to-line output is obtained for a reference input of 1.3 V. For high-
er reference voltages, two resistors R' must be inserted in series
with the inputs as shown in FIGURE 2. These resistors scale the
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相关代理商/技术参数 |
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|---|---|
| DSC-11524 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital to Synchro Conversion|15 mA DRIVE. 11.8V L-L? SYNCHRO / RESOLVER OUTPUTS |
| DSC-11524-102 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC-11524-103 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC-11524-104 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital-to-Resolver/Synchro Converter |
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