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参数资料
| 型号： | DSC-11524-303S |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | DIGITAL TO SYNCHRO OR RESOLVER, DIP36 |
| 封装： | DDIP-36 |
| 文件页数： | 2/13页 |
| 文件大小： | 529K |
| 代理商： | DSC-11524-303S |
10
Data Device Corporation
www.ddc-web.com
DSC-11524
L-7/08-0
LVDT SIMULATION
To test an LVDT application using a Synchro/Resolver simulator,
the angular bit weights of the R/D converter, in the linear mode,
are modified as follows (Also see Table 5):
BIT 3: 0.5/0.5 = 1
Arc Tan (1) = 45°
BIT 4: 0.25/0.75 = 0.333
Arc Tan (0.333) = 18.435°
BIT 5: 0.125/0.875 = 0.143
Arc Tan (0.143) = 8.130°
tABLE 5. AnGULAR BIt wEIGhtS FOR LVDt SIMULAtIOn
DAtA BIt On
AnGLE
3
4
5
6
7
8
9
10
11
12
13
14
15
16
45°
18.435°
8.130°
3.814°
1.848°
0.911°
0.451°
0.225°
0.112°
0.056°
0.028°
0.014°
0.007°
0.0035°
DSC-11524
Direct Output Mode
Digital Angle
Input
SIN
COS
RTN
VA
VB
GND
( 3 Wire LVDT Output )
} See%ofTravel
Column of Table 5
}
See Table 4
Data Bit On
FIGURE 7. LVDt SIMULAtIOn
% OF FULL tRAVEL
.5(Center Null Point)
0.333
0.143
0.0667
0.03226
0.01587
0.00787
0.00392
0.00196
0.00098
0.00049
0.00024
0.00012
0.00006
.707
50%
Full Travel
(B)
B=D/R output simulating 50% travel
Sum = .707 + .707 = 1.4
1
0 Travel
(Null)
FIGURE 6. LVDt OUtpUt
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