参数资料
型号: DSPIC30F1010T-30I/SO
厂商: Microchip Technology
文件页数: 6/66页
文件大小: 0K
描述: IC DSPIC MCU/DSP 6K 28SOIC
产品培训模块: Asynchronous Stimulus
标准包装: 1,600
系列: dsPIC™ 30F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 30 MIP
连通性: I²C,IrDA,LIN,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 21
程序存储器容量: 6KB(2K x 24)
程序存储器类型: 闪存
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 6x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
配用: DM300023-ND - KIT DEMO DSPICDEM SMPS BUCK
其它名称: DSPIC30F1010T-30I/SOTR
dsPIC30F Flash Programming Specification
DS70102K-page 14
2010 Microchip Technology Inc.
EBS
FBS
Boot Segment Data EEPROM Code Protection (only present in dsPIC30F5011/
5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = No Data EEPROM is reserved for Boot Segment
0 = 128 bytes of Data EEPROM are reserved for Boot Segment in dsPIC30F5011/
5013, and 256 bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/6015
BSS<2:0>
FBS
Boot Segment Program Memory Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
111 = No Boot Segment
110 = Standard security; Small-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x0003FF]
101 = Standard security; Medium-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x000FFF]
100 = Standard security; Large-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x001FF]
011 = No Boot Segment
010 = High security; Small-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x0003FF]
001 = High security; Medium-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x000FFF]
000 = High security; Large-sized Boot Program Flash
[Boot Segment starts after BS and ends at 0x001FFF]
BWRP
FBS
Boot Segment Program Memory Write Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = Boot Segment program memory is not write-protected
0 = Boot Segment program memory is write-protected
RSS<1:0>
FSS
Secure Segment Data RAM Code Protection (only present in dsPIC30F5011/
5013/6010A/6011A/6012A/6013A/6014A/6015)
11 = No Data RAM is reserved for Secure Segment
10 = Small-sized Secure RAM
[(256 – N) bytes of RAM are reserved for Secure Segment]
01 = Medium-sized Secure RAM
[(768 – N) bytes of RAM are reserved for Secure Segment in dsPIC30F5011/
5013, and (2048 – N) bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/
6015]
00 = Large-sized Secure RAM
[(1024 – N) bytes of RAM are reserved for Secure Segment in dsPIC30F5011/
5013, and (4096 – N) bytes in dsPIC30F6010A/6011A/6012A/6013A/6014A/
6015]
where N = Number of bytes of RAM reserved for Boot Sector.
ESS<1:0>
FSS
Secure Segment Data EEPROM Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
11 = No Data EEPROM is reserved for Secure Segment
10 = Small-sized Secure Data EEPROM
[(128 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, and (256 – N) bytes in dsPIC30F6010A/6011A/6012A/
6013A/6014A/6015]
01 = Medium-sized Secure Data EEPROM
[(256 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, and (512 – N) bytes in dsPIC30F6010A/6011A/6012A/
6013A/6014A/6015]
00 = Large-sized Secure Data EEPROM
[(512 – N) bytes of Data EEPROM are reserved for Secure Segment in
dsPIC30F5011/5013, (1024 – N) bytes in dsPIC30F6011A/6013A, and (2048 –
N) bytes in dsPIC30F6010A/6012A/6014A/6015]
where N = Number of bytes of Data EEPROM reserved for Boot Sector.
TABLE 5-7:
CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
Description
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