参数资料
型号: DSPIC30F2010-30I/SP
厂商: Microchip Technology
文件页数: 52/66页
文件大小: 0K
描述: IC DSPIC MCU/DSP 12K 28DIP
产品培训模块: dsPIC30F Quadrature Encoder Interface
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
标准包装: 15
系列: dsPIC™ 30F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 30 MIP
连通性: I²C,SPI,UART/USART
外围设备: 高级欠压探测/复位,电机控制 PWM,QEI,POR,PWM,WDT
输入/输出数: 20
程序存储器容量: 12KB(4K x 24)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 2.5 V ~ 5.5 V
数据转换器: A/D 6x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-DIP(0.300",7.62mm)
包装: 管件
产品目录页面: 650 (CN2011-ZH PDF)
配用: DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
其它名称: DSPIC30F2010-30I
DSPIC30F2010-30I-ND
DSPIC30F2010-30I/SPG
DSPIC30F201030ISP
dsPIC30F Flash Programming Specification
DS70102K-page 56
2010 Microchip Technology Inc.
12.2
Programming Verification
After
the
programming
executive
has
been
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
Reading the contents of executive memory can be
performed using the same technique described in
A
procedure for reading executive memory is shown in
Table 12-2. Note that in Step 2, the TBLPAG register is
set to 0x80 such that executive memory may be read.
TABLE 12-2:
READING EXECUTIVE MEMORY
Command
(Binary)
Data
(Hexadecimal)
Description
Step 1: Exit the Reset vector.
0000
040100
000000
GOTO 0x100
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
200800
880190
EB0300
MOV
#0x80, W0
MOV
W0, TBLPAG
CLR
W6
Step 3: Initialize the write pointer (W7), and store the next four locations of executive memory to W0:W5.
0000
EB0380
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA1BB6
000000
BA1B96
000000
BADBB6
000000
BADBD6
000000
BA1BB6
000000
CLR
W7
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7++]
NOP
TBLRDL
[W6], [W7++]
NOP
TBLRDH.B
[W6++], [W7++]
NOP
TBLRDH.B
[++W6], [W7++]
NOP
TBLRDL
[W6++], [W7]
NOP
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