参数资料
型号: DSPIC33FJ12MC201-E/SS
厂商: Microchip Technology
文件页数: 5/155页
文件大小: 0K
描述: IC DSPIC MCU/DSP 12K 20SSOP
产品培训模块: Asynchronous Stimulus
标准包装: 67
系列: dsPIC™ 33F
核心处理器: dsPIC
芯体尺寸: 16-位
速度: 40 MIP
连通性: I²C,IrDA,SPI,UART/USART
外围设备: 高级欠压探测/复位,电机控制 PWM,QEI,POR,PWM,WDT
输入/输出数: 15
程序存储器容量: 12KB(12K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
包装: 管件
配用: DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
102
A/T89C51AC2
4127H–8051–02/08
Notes:
1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with
TCLCH, TCHCL = 5 ns (see Figure 53.), VIL = VSS + 0.5V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher
if a crystal oscillator used (see Figure 50.).
2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH,
TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C; Port 0 = VCC; EA = RST
= VSS (see Figure 51.).
3. Power-down ICC is measured with all output pins disconnected; EA = VCC, PORT 0 =
VCC; XTAL2 NC.; RST = VSS (see Figure 52.). In addition, the WDT must be inactive
and the POF flag must be set.
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be super-
imposed on the VOLs of ALE and Ports 1 and 3. The noise is due to external bus
capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the
noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt
Trigger use is not necessary.
5. Typicals are based on a limited number of samples and are not guaranteed. The val-
ues listed are at room temperature.
6. Under steady state (non-transient) conditions, IOL must be externally limited as fol-
lows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are
not guaranteed to sink current greater than the listed test conditions.
7. ICC_FLASH_WRITE operating current while a Flash block write is on going.
Figure 50. ICC Test Condition, Active Mode
EA
VCC
ICC
(NC)
CLOCK
SIGNAL
V
CC
All other pins are disconnected.
RST
XTAL2
XTAL1
V
SS
V
CC
P0
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