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参数资料
| 型号： | DV75D-012.8M |
| 厂商： | Connor-Winfield |
| 文件页数： | 1/2页 |
| 文件大小： | 0K |
| 描述： | OSC TCXO 12.800 MHZ 3.3V SMD |
| 标准包装： | 1 |
| 系列： | DV75D |
| 类型： | TCXO |
| 频率： | 12.8MHz |
| 功能： | 三态（输出启用） |
| 输出： | LVCMOS |
| 电源电压： | 3.135 V ~ 3.465 V |
| 频率稳定性： | ±1ppm |
| 工作温度： | -40°C ~ 85°C |
| 电流 - 电源（最大）： | 6mA |
| 其它名称： | CW744DKR |
Available at Digi-Key
Description:
Features:
Surface Mount Temperature Compensated ?
DV
20 D 12
Crystal Controlled Oscillator (TCXO) with ?
MH 02
?
?
?
?
Applications:
?
2111ComprehensiveDrive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
US Headquarters:
630-851-4722
European Headquarters:
The Connor-Winfield’s DV75D is a 5x7mm ?
75
.0
Z
LVCMOS output. Through the use of Analog
Temperature Compensation, the DV75D
is capable of holding sub 1-ppm stabilities
over the -40 to 85°C temperature range.
?
GR-253-CORE (SMC)
ITU-T-G.813 Option 1 and 2 (SEC)
Absolute Maximum Ratings
TCXO
3.3 Vdc Operation
LVCMOS Output
Frequency Stability: ± 1.0 ppm
Temperature Range: -40 to 85°C
Low Jitter <1ps RMS
5x7mm Surface Mount Package
Tape and Reel Packaging
RoHS Compliant / Pb Free
+353-61-472221
Parameter
Storage Temperature
Supply Voltage (Vcc)
Input Voltage
Minimum
-55
-0.5
-0.5
Nominal
-
-
-
Maximum
85
6.0
Vcc+0.5
Units
°C
Vdc
Vdc
Notes
Operating Specifications
Parameter
Nominal Frequency (Fo)
Frequency Calibration @ 25 °C
Frequency Stability vs. Temperature
Frequency vs. Load Stability
Frequency vs. Voltage Stability
Static Temperature Hysteresis
Aging
Operating Temperature Range:
Supply Voltage (Vcc)
Supply Current (Icc)
Period Jitter
Integrated Phase Jitter
Minimum
-
-1.0
-1.0
-0.2
-0.2
-
-1.0
-40
3.135
-
-
-
Nominal
10.0, 12.8 or 20.0
-
-
-
-
-
-
-
3.3
-
3
0.5
Maximum
-
1.0
1.0
0.2
0.2
0.4
1.0
85
3.465
6
5
1.0
Units
MHz
ppm
ppm
ppm
ppm
ppm
ppm/year
°C
Vdc
mA
ps rms
ps rms
Notes
1
2
±5%
±5%
3
±5%
4
Typical Phase Noise Fo = 20.0 MHz
SSB Phase Noise at 10Hz offset
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
Start-up Time
-
-
-
-
-
-
-80
-110
-135
-150
-150
-
-
-
-
-
-
10
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ms
LVCMOS Output Characteristics
Parameter
Load
Voltage (High) (Voh)
(Low) (Vol)
Duty Cycle at 50% of Vcc
Rise / Fall Time 10% to 90%
Minimum
-
90%Vcc
-
45
-
Nominal
15
-
-
50
-
Maximum
-
-
10%Vcc
55
8
Units
pF
Vdc
Vdc
%
ns
Notes
5
Package Characteristics
Package
Vibration:
Shock:
Soldering Process;
Hermetically sealed crystal mounted on a ceramic package
Environmental Characteristics
Vibration per Mil Std 883E Method 2007.3 Test Condition A
Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B.
RoHS compliant lead free. See soldering profile on page 2.
Ordering Information
DV75D-010.0M, DV75D-012.8M or DV75D-020.0M
Bulletin
Page
Revision
Date
Tx356
1 of 2
03
03 Dec 2013
Notes:
1. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation.
2. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)].
3. Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C.
4. BW = 12 KHz to 20 MHz.
5. For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF.
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