参数资料
型号: E5551A-DIT
英文描述: Transponder
中文描述: 转发
文件页数: 4/21页
文件大小: 157K
代理商: E5551A-DIT
e5551
Rev. A2, 19-Apr-00
12 (21)
16 ms
No modulation
Write mode
Check V
HV on
Modulation
Operation
Write
Vpp/Lock ok?
Program EEPROM
READ
0.12 ms
Writing done (> 64 clocks since last gap)
Programming ends
Reading starts
Programming starts
HV on for testing if Vpp is ok
(HV at EEPROMs)
pp
Figure 20. Programming
V
16 ms
Read programming block
Read next block
Programming
with updated modes
Write data into the IC
(e.g., new bitrate)
(= block 0)
Coil 1 – Coil 2
Figure 21. Coil voltage after programming of block 0
Programming
When all necessary information has been written to the
e5551, programming may proceed. There is a 32-clock
delay between the end of writing and the start of pro-
gramming. During this time, Vpp – the EEPROM
programming voltage – is measured and the lock bit for
the block to be programmed is examined. Further, Vpp is
continually monitored throughout the programming
cycle. If at any time Vpp is too low, the chip enters read
mode immediately.
The programming time is 16 ms.
After programming is done, the e5551 enters read mode,
starting with the block just programmed. If either block
or sequence terminators are enabled, the block is pre-
ceded by a block terminator. If the mode register (block 0)
has been reprogrammed, the new mode will be activated
after the just-programmed block has been transmitted
using the previous mode.
Error Handling
Several error conditions can be detected to ensure that
only valid bits are programmed into the EEPROM. There
are two error types which lead to different actions.
Errors During Writing
There are four detectable errors which could occur during
writing data into the e5551:
D Wrong number of field clocks between two gaps
D The OP-code is neither the standard OP-code (’10‘)
nor the stop OP-code (’11‘)
D Password mode is active but the password does not
match the contents of block 7
D The number of bits received is incorrect;
valid bit counts are
D Standard write 38 bits (PWD not set)
D Password write 70 bits (PWD set)
D AOR wake-up 34 bits
D Stop command 2 bits
If any of these four conditions are detected, the IC
starts read mode immediately after leaving write mode.
Reading starts with block 1.
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