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参数资料
| 型号： | E5551A-DOW |
| 英文描述： | Transponder |
| 中文描述： | 转发 |
| 文件页数： | 12/21页 |
| 文件大小： | 157K |
| 代理商： | E5551A-DOW |
e5551
Rev. A2, 19-Apr-00
2 (21)
Pads
Name
Pad Window
Function
Coil1
136
mm2
1st coil pad
Coil2
136
mm2
2nd coil pad
Vdd
78
mm2
Positive supply voltage
Vss
78
mm2
Negative supply voltage
(gnd)
Test1
78
mm2
Test pad
Test2
78
mm2
Test pad
Test3
78
mm2
Test pad
Coil 1
Coil 2
1
2
3
4
8
7
6
5
e5551
Note:
Pins 2 to 7 have to be open. They are
not specified for applications
Figure 2. Pinning SO8
e5551 Building Blocks
Analog Front End (AFE)
The AFE includes all circuits which are directly
connected to the coil. It generates the IC’s power supply
and handles the bidirectional data communication with
the reader unit. It consists of the following blocks:
D Rectifier to generate a dc supply voltage from the ac
coil voltage
D Clock extractor
D Switchable load between Coil1/ Coil2 for data trans-
mission from the IC to the reader unit (read)
D Field gap detector for data transmission from the
reader unit into the IC (write)
Controller
The main controller has following functions:
D Load mode register with configuration data from
EEPROM block 0 after power-on and also during
reading
D Control memory access (read, write)
D Handle write data transmission and the write error
modes
D The first two bits of the write data stream are the OP-
code. There are two valid OP-codes (standard and
stop) which are decoded by the controller.
D In password mode, the 32 bits received after the OP-
code are compared with the stored password in
block 7.
Bitrate Generator
The bitrate generator can deliver the following bitrates:
RF/8 - RF/16 - RF/32 - RF/40 - RF/50 - RF/64 - RF/100 - RF/128
Write Decoder
Decode the detected gaps during writing. Check if write
data stream is valid.
Test Logic
Test circuitry allows rapid programming and verification
of the IC during test.
HV Generator
Voltage pump which generates
[18 V for programming
of the EEPROM.
Pad Layout
Coil 1
Coil 2
VV
Test pads
DD
SS
e5551
Figure 3. Pad layout
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