参数资料
型号: E693-EDGE693
英文描述: 500 MHz Monolithic Dual Pin Electronics Driver
中文描述: 500 MHz的单片双引脚电子驱动器
文件页数: 6/11页
文件大小: 77K
代理商: E693-EDGE693
4
2000 Semtech Corp.
www.semtech.com
EDGE HIGH-PERFORMANCE PRODUCTS
Edge693
Circuit Description
Introduction
The driver circuit will force the DOUT output to one of
three states:
1.
DVH (driver high voltage level)
2.
DVL (driver low voltage level)
3.
High Impedance (Hi Z).
Both driver digital control inputs (DHI/DHI*, DRVEN/
DRVEN*) are wide-voltage differential inputs capable of
receiving ECL, TTL, and CMOS signals. Single-ended
operation is achievable by generating the proper
threshold levels for the inverting inputs.
Drive Enable
The drive enable (DRVEN/DRVEN*) inputs control
whether the driver is forcing a voltage or is placed in a
high-impedance state. If DRVEN is more positive than
DRVEN*, the output will force either DVL or DVH,
depending on the driver data inputs. When DRVEN is
more negative than DRVEN*, the output is set to high-
impedance, independent of the driver data inputs.
Driver Data
The driver data inputs (DHI/DHI*) determine whether
the driver output is high or low. If DHI is more positive
than DHI*, the output will force DVH when the driver is
enabled. If DHI is more negative than DHI*, the output
will force DVL when the driver is enabled.
Table 1 summarizes the functionality of the driver enable
and driver data pins.
Table 1. DRVEN and DHI Pin Functionality
Driver Levels
DVH and DVL are high-input impedance voltage controlled
inputs that establish the driver logical high and low levels
respectively.
Slew Rate Adjustment
The driver rising and falling slew rates are adjustable
from 3.0 V/ns to 1 V/ns. The SLEWADJ signals are
current controlled inputs that vary the rising and falling
edge slew rates. An input current of 2.0 mA translates
to a slew rate of 3.0 V/ns. An input current of 0.8 mA
forces a 1 V/ns edge (see Figure 1).
Figure 1. Slew Rate Control
Notice that the driver A slew rate and driver B slew rate
are independent. However, the rising and falling edge
slew rates on each driver track each other and are not
independent (see Figure 2).
Figure 2. Output Slew Rate Adjustability
*
N
E
V
R
D
,
N
E
V
R
D*
I
H
D
,
I
H
DT
U
O
D
*
N
E
V
R
D
>
N
E
V
R
D*
I
H
D
>
I
H
DH
V
D
*
N
E
V
R
D
>
N
E
V
R
D*
I
H
D
<
I
H
DL
V
D
*
N
E
V
R
D
<
N
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V
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DX
Z
i
H
2.5
1.0
0.8
2.0
SLEWADJ (mA)
(BIAS = 1.5 mA)
Sle
w
Rate
(V/ns)
a
b
a. SLEWADJ = 2.0 mA, Rising SR = Falling SR = 2.5V/ns.
b. SLEWADJ = 0.8 mA, Rising SR = Falling SR = 1.0V/ns.
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