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参数资料
| 型号： | EDI8F81024C-BS |
| 英文描述： | Dual Channel, High Speed, High Current Line Driver with 3-State; Temperature Range: -40°C to 85°C; Package: 8-PDIP |
| 中文描述： | SRAM模块 |
| 文件页数： | 4/6页 |
| 文件大小： | 111K |
| 代理商： | EDI8F81024C-BS |
4
EDI8F321024CA Rev. 0 7/98 ECO#10589
EDI8F321024CA
1024Kx32 SRAM Module
Note 1: Parameter guaranteed, but not tested.
Write Cycle 1 - W Controlled
Symbol
15ns
17ns
Parameter
JEDEC
Alt.
Min
Max
Min
Max
Units
Write Cycle Time
TAVAV
TWC
15
ns
Chip Enable to End of Write
TELWH
TCW
10
12
ns
TWLEH
TCW
10
12
ns
Address Setup Time
TAVWL
TAS
0
ns
TAVEL
TAS
0
ns
Address Valid to End of Write
TAVWH
TAW
10
12
ns
TAVEH
TAW
10
12
ns
Write Pulse Width
TWLWH
TWP
10
12
ns
TELEH
TWP
10
12
ns
Write Recovery Time
TWHAX
TWR
0
ns
TEHAX
TWR
0
ns
Data Hold Time
TWHDX
TDH
0
ns
TEHDX
TDH
0
ns
Write to Output in High Z (1)
TWLQZ
TWHZ
0
7
0
8
ns
Data to Write Time
TDVWH
TDW
7
10
ns
TDVEH
TDW
7
10
ns
Output Active from End of Write (1)
TWHQX
TWLZ
3
ns
A
E
W
D
Q
TAVAV
TELWH
TAVWH
TWLWH
TAVWL
TDVWH
TWHDX
TWHQX
HIGH Z
TWLQZ
DATA VALID
TWHAX
AC Characteristics Write Cycle
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