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参数资料
| 型号： | EDI8F82045C |
| 英文描述： | 2 Megabits x 8 Static RAM CMOS, Module(2Mx8 CMOS静态RAM模块) |
| 中文描述： | 2兆位× 8静态RAM的CMOS模块（2Mx8的CMOS静态内存模块） |
| 文件页数： | 2/6页 |
| 文件大小： | 111K |
| 代理商： | EDI8F82045C |
EDI8F82045C
2Megx8 SRAM Module
2
EDI8F82045C Rev. 5.0 6/96 ECO#7549
Absolute Maximum Ratings*
Recommended DC Operating Conditions
DC Electrical Characteristics
Parameter
Sym
Conditions
Min
Typ*
Max
Units
Operating Power
ICC1
W, E = VIL, II/O = 0mA,
--
150
mA
Supply Current
Min Cycle
Standby (TTL) Power
ICC2
E
≥ VIH, VIN ≤ VIL
--
55
mA
Supply Current
VIN
≥ VIH
Full Standby Power
ICC3
E
≥ VCC-0.2V
C
--
2
3
mA
Supply Current (CMOS)
VIN
≥ VCC-0.2V or
LP
--
450
600
A
VIN
≤ 0.2V
Input Leakage Current
ILI
VIN = 0V to VCC
-10
--
10
A
Output Leakage Current
ILO
V I/O = 0V to VCC
-10
--
10
A
Output High Voltage
VOH
IOH =-1.0mA
2.4
--
V
Output Low Voltage
VOL
IOL = 2.1mA
--
0.4
V
*Typical: TA = 25
°C, VCC = 5.0V
Capacitance
Truth Table
Parameter
Sym
Max
Unit
Address Lines
CI
30
pF
Data Lines
CD/Q
43
pF
Chip Enable Line
CC
10
pF
Write and Output Enable Lines CW
32
pF
These parameters are sampled, not 100% tested.
AC Test Conditions
Parameter
Sym
Min
Typ
Max Units
Supply Voltage
VCC
4.5
5.0
5.5
V
Supply Voltage
VSS
0
V
Input High Voltage
VIH
2.2
--
6.0
V
Input Low Voltage
VIL
-0.3
--
0.8
V
Voltage on any pin relative to VSS
-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial
0
°C to +70°C
Industrial
-40
°C to +85°C
Storage Temperature
-55
°C to +125°C
Power Dissipation
1 Watt
Output Current.
20 mA
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
G
E
W
Mode
Output
Power
X
H
X
Standby
High Z
ICC2, ICC3
H
L
H
Output Deselect High Z
ICC1
L
H
Read
DOUT
ICC1
X
L
Write
DIN
ICC1
Input Pulse Levels
VSS to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load
1TTL, CL =100pF
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
(f=1.0MHz, VIN=VCC or VSS)
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