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参数资料
| 型号： | EDI8G322048C |
| 英文描述： | 2048Kx32 Static RAM CMOS, High Speed Module(2048Kx32 高速CMOS静态RAM模块) |
| 中文描述： | 2048Kx32的CMOS静态RAM，高速模块（2048Kx32高速的CMOS静态内存模块） |
| 文件页数： | 3/6页 |
| 文件大小： | 86K |
| 代理商： | EDI8G322048C |
3
EDI8G322048C Rev. 0 3/98 ECO #9722
EDI8G322048C
2048Kx32 SRAM Module
Absolute Maximum Ratings*
Recommended DC Operating Conditions
DC Electrical Characteristics
Parameter
Sym
Conditions
Min
Typ
Max
Units
Operating Power Supply Current
ICC1 W, E = VIL, II/O = 0mA, Min Cycle
1750
mA
Standby (TTL) Power Supply Current
ICC2
E
≥ VIH, VIN ≤ VIL or VIN ≥ VIH
800
mA
Full Standby Power Supply Current
ICC3
E
≥ VCC-0.2V
160
mA
CMOS
VIN
≥ VCC-0.2V or VIN ≤ 0.2V
Input Leakage Current
ILI
VIN = 0V to VCC
--
±80
A
Output Leakage Current
ILO
V I/O = 0V to VCC
--
±20
A
Output High Voltage
VOH
IOH = -4.0mA
2.4
--
V
Output Low Voltage
VOL
IOL = 8.0mA
--
0.4
V
Capacitance
(f=1.0MHz, VIN=VCC or VSS)
Parameter
Sym
Max
Unit
Address Lines
CI
120
pF
Data Lines
CD/Q
20
pF
Chip Enable Line
CC
120
pF
Write Line
CN
120
pF
AC Test Conditions
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Parameter
Sym
Min
Typ
Max Units
Supply Voltage
VCC
4.5
5.0
5.5
V
Supply Voltage
VSS
0
V
Input High Voltage
VIH
2.2
--
6.0
V
Input Low Voltage
VIL
-0.3
--
0.8
V
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
Voltage on any pin relative to VSS
-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial.
0°C to +70°C
Industrial
-40°C to +85°C
Storage Temperature, Plastic
-55°C to +125°C
Power Dissipation
7.0 Watts
Output Current.
20 mA
Input Pulse Levels
VSS to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load
1TTL, CL = 30pF
*Typical: TA = 25°C, VCC = 5.0V
E0\ E1\
E2\
E3\
W\
G\
Operational Comments
H
Disabled
L
H
L
Read Double Word
L
H
Write Double Word
*
L
H
Write One or More Bytes in Double Word
*
H
L
Read One or More Bytes in Double Word
These parameters are sampled, not 100% tested.
*Each enable controls one byte (x8) within the x32 (doubleword) and One or more byte enables may be driven
valid during this operation.
Truth Table
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