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directly by the instructions ASR, LSR, LSL, ROR, and RRX, and the result is written to a destination
register
during the calculation of Operand2 by the instructions that specify the second operand as a register
The permitted shift lengths depend on the shift type and the instruction, see the individual instruction
update the carry flag except when the specified shift length is 0. The following sub-sections describe
the various shift operations and how they affect the carry flag. In these descriptions, Rm is the register
containing the value to be shifted, and n is the shift length.
3.3.4.1 ASR
Arithmetic shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places,
into the right-hand 32-n bits of the result. And it copies the original bit[31] of the register into the left#hand
n
You can use the ASR #n operation to divide the value in the register Rm by 2
n, with the result being
rounded towards negative-infinity.
When the instruction is ASRS or when ASR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.
If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.
Figure 3.1. ASR #3
31
1 0
Carry
Flag
...
2
3
4
5
3.3.4.2 LSR
Logical shift right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places, into
the right-hand 32-n bits of the result. And it sets the left#hand n bits of the result to 0. See
Figure 3.2 (p.You can use the LSR #n operation to divide the value in the register Rm by 2
n, if the value is regarded
as an unsigned integer.
When the instruction is LSRS or when LSR #n is used in Operand2 with the instructions MOVS, MVNS,
ANDS
, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1],
of the register Rm.
Note
If n is 32 or more, then all the bits in the result are cleared to 0.
If n is 33 or more and the carry flag is updated, it is updated to 0.