参数资料
型号: EFM32G842F128
厂商: Energy Micro
文件页数: 11/136页
文件大小: 0K
描述: IC MCU 32BIT 128KB FLASH 64LQFP
标准包装: 1
系列: Gecko
核心处理器: ARM? Cortex?-M3
芯体尺寸: 32-位
速度: 32MHz
连通性: I²C,IrDA,智能卡,SPI,UART/USART
外围设备: 欠压检测/复位,DMA,LCD,POR,PWM,WDT
输入/输出数: 53
程序存储器容量: 128KB(128K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 3.8 V
数据转换器: A/D 8x12b,D/A 2x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 64-TQFP
包装: 标准包装
其它名称: 914-1028-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
108
www.energymicro.com
Bits
Name
Function
1 = a data bus error has occurred, and the PC value stacked for the exception return points to
the instruction that caused the fault.
When the processor sets this bit is 1, it writes the faulting address to the BFAR.
[0]
IBUSERR
Instruction bus error:
0 = no instruction bus error
1 = instruction bus error.
The processor detects the instruction bus error on prefetching an instruction, but it sets the
IBUSERR flag to 1 only if it attempts to issue the faulting instruction.
When the processor sets this bit is 1, it does not write a fault address to the BFAR.
4.3.11.3 Usage Fault Status Register
The UFSR indicates the cause of a usage fault. The bit assignments are:
NOCP
INVPC
INVSTATE
UNDEFINSTR
DIVBYZERO
UNALIGNED
15
10 9 8 7
4 3 2 1 0
Reserved
Table 4.28. UFSR bit assignments
Bits
Name
Function
[15:10]
-
Reserved.
[9]
DIVBYZERO
Divide by zero usage fault:
0 = no divide by zero fault, or divide by zero trapping not enabled
1 = the processor has executed an SDIV or UDIV instruction with a divisor of 0.
When the processor sets this bit to 1, the PC value stacked for the exception return points to
the instruction that performed the divide by zero.
Enable trapping of divide by zero by setting the DIV_0_TRP bit in the CCR to 1, see
[8]
UNALIGNED
Unaligned access usage fault:
0 = no unaligned access fault, or unaligned access trapping not enabled
1 = the processor has made an unaligned memory access.
Enable trapping of unaligned accesses by setting the UNALIGN_TRP bit in the CCR to 1, see
Unaligned LDM, STM, LDRD, and STRD instructions always fault irrespective of the setting of
UNALIGN_TRP.
[7:4]
-
Reserved.
[3]
NOCP
No coprocessor usage fault. The processor does not support coprocessor instructions:
0 = no usage fault caused by attempting to access a coprocessor
1 = the processor has attempted to access a coprocessor.
[2]
INVPC
Invalid PC load usage fault, caused by an invalid PC load by EXC_RETURN:
0 = no invalid PC load usage fault
1 = the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an
invalid context, or an invalid EXC_RETURN value.
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