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| 型号： | EL4583AISZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 9/10页 |
| 文件大小： | 0K |
| 描述： | IC SEPARATOR SYNC S-H 16SOIC |
| 标准包装： | 1 |
| 类型： | 同步分离器 |
| 应用： | 多媒体显示器，测试设备 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 标准包装 |
| 其它名称： | EL4583AISZ-T7DKR |
8
FN7503.2
November 12, 2010
Description of Operation
A simplified block schematic is shown in Figure 1. The
following description is intended to provide the user with
sufficient information to understand the effects of the
external components and signal conditions on the outputs of
the integrated circuit.
The video signal is AC coupled to pin 4 via the capacitor C1,
nominally 0.1F. The clamp circuit A1 will prevent the input
signal on pin 4 going more negative than 1.5V, the value of
reference voltage VR1. Thus the sync tip, the most negative
part of the video waveform, will be clamped at 1.5V. The
current source I1, nominally 6A, charges the coupling
capacitor during the remaining portion of the H line,
approximately 58s for a 15.75kHz timebase. From I t = C
V, the video time-constant can be calculated. It is important
to note that the charge taken from the capacitor during video
must be replaced during the sync tip time, which is much
shorter, (ratio of x 12.5). The corresponding current to
restore the charge during sync will therefore be an order of
magnitude higher, and any resistance in series with CI will
cause sync tip crushing. For this reason, the internal series
resistance has been minimized and external high resistance
values in series with the input coupling capacitor should be
avoided. The user can exercise some control over the value
of the input time constant by introducing an external pull-up
resistance from pin 4 to the 5V supply. The maximum
voltage across the resistance will be VDD less 1.5V, for black
level. For a net discharge current greater than zero, the
resistance should be greater than 450k. This will have the
effect of increasing the time constant and reducing the
degree of picture tilt. The current source I1 directly tracks
reference current ITR and thus increases with scan rate
adjustment, as explained later.
The signal is processed through an active 3 pole filter (F1)
designed for minimum ripple with constant phase delay. The
filter attenuates the color burst by 12dB and eliminates fast
transient spikes without sync crushing. An external filter is
not necessary. The filter also amplifies the video signal by
6dB to improve the detection accuracy. The filter cut-off
frequency is controlled by an external resistor from pin 1 to
ground.
Internal reference voltages (block VREF) with high immunity
to supply voltage variation are derived on the chip.
Reference VR4 with op-amp A2 forces pin 12 to a reference
voltage of 1.7V nominal. Consequently, it can be seen that
the external resistance RSET will determine the value of the
reference current ITR. The internal resistance R3 is only
about 6k
Ω, much less than RSET. All the internal timing
FIGURE 4. STANDARD (NTSC INPUT) H. SYNC DETAIL
EL4583A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| EL4583AISZ-T7S2716 | 制造商:Intersil Corporation 功能描述: |
| EL4583C | 制造商:ELANTEC 制造商全称:ELANTEC 功能描述:Sync Separator, 50% Slice, S-H, Filter, HOUT |
| EL4583CN | 功能描述:IC VIDEO SYNC SEPARATOR 16-DIP RoHS:否 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064 |
| EL4583CS | 功能描述:IC VIDEO SYNC SEPARATOR 16-SOIC RoHS:否 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064 |
| EL4583CS-T13 | 功能描述:IC SYNC SEPARATOR S-H 50% 16SOIC RoHS:否 类别:集成电路 (IC) >> 线性 - 视频处理 系列:- 产品变化通告:Product Discontinuation 07/Mar/2011 标准包装:3,000 系列:OMNITUNE™ 类型:调谐器 应用:移动电话，手机，视频显示器 安装类型:表面贴装 封装/外壳:65-WFBGA 供应商设备封装:PG-WFSGA-65 包装:带卷 (TR) 其它名称:SP000365064 |
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