参数资料
| 型号： | EL5102IW-T7A |
| 厂商： | Intersil |
| 文件页数： | 8/13页 |
| 文件大小： | 0K |
| 描述： | IC VFA SLEW SGL 400MHZ SOT23-6 |
| 标准包装： | 250 |
| 放大器类型： | 电压反馈 |
| 电路数： | 1 |
| 转换速率： | 4000 V/µs |
| -3db带宽： | 400MHz |
| 电流 - 输入偏压： | 2µA |
| 电压 - 输入偏移： | 1000µV |
| 电流 - 电源： | 5.2mA |
| 电流 - 输出 / 通道： | 150mA |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 13.2 V，±1.5 V ~ 6.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-23-6 |
| 包装： | 带卷 (TR) |
EL5202, EL5203
4
FN7331.9
January 17, 2014
Closed Loop AC Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25°C, VCE = 0V, AV = +1, RF = 0Ω, RL = 150Ω to GND,
Unless Otherwise Specified. (Note 6)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 9)
TYP
MAX
(Note 9)
UNIT
BW
-3dB Bandwidth (VOUT = 400mVP-P)AV = 1, RF = 0Ω
400
MHz
SR
Slew Rate
AV = +2, RL = 100Ω, VOUT = -3V to +3V
1100
2200
5000
V/s
RL = 500Ω, VOUT = -3V to +3V
4000
V/s
tR,tF
Rise Time, Fall Time
±0.1V step
2.8
ns
OS
Overshoot
±0.1V step
10
%
tS
0.1% Settling Time
VS = ±5V, RL = 500Ω, AV = 1, VOUT = ±3V
20
ns
dG
Differential Gain (Note 7)
AV = 2, RF = 1kΩ
0.01
%
dP
Differential Phase (Note 7)
AV = 2, RF = 1kΩ
0.01
°
eN
Input Noise Voltage
f = 10kHz
12
nV/
√Hz
iN
Input Noise Current
f = 10kHz
11
pA/
√Hz
tDIS
Disable Time (Note 8)
50
ns
tEN
Enable Time (Note 8)
25
ns
NOTES:
6. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested.
7. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled.
8. Disable/Enable time is defined as the time from when the logic signal is applied to the CE pin to when the supply current has reached half its final
value.
9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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