参数资料
| 型号： | EL5211IYEZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 5/18页 |
| 文件大小： | 0K |
| 描述： | IC AMP DUAL R-R I/O 60MHZ 8HMSOP |
| 标准包装： | 1,500 |
| 放大器类型： | 电压反馈 |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 75 V/µs |
| 增益带宽积： | 32MHz |
| -3db带宽： | 60MHz |
| 电流 - 输入偏压： | 2nA |
| 电压 - 输入偏移： | 3000µV |
| 电流 - 电源： | 5mA |
| 电流 - 输出 / 通道： | 65mA |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VSSOP，8-MSOP（0.118"，3.00mm 宽）裸露焊盘 |
| 供应商设备封装： | 8-HMSOP |
| 包装： | 带卷 (TR) |
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY (SINGLE LAYER) TEST BOARD
P
O
WER
DISSIP
A
TION
(W)
0.300
0.250
0.200
0.150
0.100
0.050
0.000
0.350
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
85
150
290mW
TSOT5
θ
JA = +345°C/W
FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 34.
0.6
0.5
0.4
0.3
0.2
0.1
0.0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD
483mW
TSOT5
AMBIENT TEMPERATURE (°C)
POW
E
R
DI
SSI
P
A
TI
ON
(W)
0
25
50
75
100
125
85
150
θJA = +207°C/W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
0.4
0.3
0.2
0.1
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
P
O
WE
R
DI
SSI
PATIO
N
(W)
85
486mW
θ
JA
=
+2
06
°C
/W
HM
SO
P8
0.5
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 36.
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.9
0.6
0.4
0.3
0.2
0.1
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
P
O
WE
R
DI
SSI
PATIO
N
(W)
85
870mW
θ
JA
=
+1
15
°C
/W
HM
SO
P8
0.8
0.5
0.7
PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
13
FN7119.7
May 7, 2007
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5111, EL5211, and EL5411 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to ground, a 0.1F ceramic capacitor should be
placed from VS+ to pin to VS- pin. A 4.7F tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7F capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
EL5111, EL5211, EL5411
相关PDF资料 |
PDF描述 |
|---|---|
| TSW-114-25-G-D-RA | CONN HEADER 28POS .100" DBL R/A |
| 19003-0135 | CONN .187" FEMALE INSUL 14-16AWG |
| EL5211IYEZ-T13 | IC AMP DUAL R-R I/O 60MHZ 8HMSOP |
| 108457048008026 | CONN HEADER MALE 32POS R/A |
| 108457048002026 | CONN HEADER MALE 32POS R/A |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EL5211IY-T13 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:60MHz Rail-to-Rail Input-Output Op Amps |
| EL5211IY-T7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:60MHz Rail-to-Rail Input-Output Op Amps |
| EL5211IYZ | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:60MHz Rail-to-Rail Input-Output Op Amps |
| EL5211IYZ-T13 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:60MHz Rail-to-Rail Input-Output Op Amps |
| EL5211IYZ-T7 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:60MHz Rail-to-Rail Input-Output Op Amps |
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