参数资料
型号: EL5325AIREZ-T13
厂商: Intersil
文件页数: 8/12页
文件大小: 0K
描述: IC VREF GEN 12CH TFT-LCD 28-TSSO
标准包装: 2,500
应用: 转换器,TFT,LCD
输入电压: 5 V ~ 16.5 V
输出数: 12
输出电压: 0.5 V ~ 14.95 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 带卷 (TR)
EL5325A
Block Diagram
REFERENCE HIGH
OUTA
OUTB
OUTJ
EIGHT
CHANNEL
MEMORY
VOLTAGE
SOURCES
OUTK
OUTL
REFERENCE LOW
REFERENCE DECOUPLE
CLK
V OUT ( IDEAL ) = V REFL + ------------- × ( V REFH - V REFL )
SDI
LOAD
Analog Section
TRANSFER FUNCTION
The transfer function is:
data
1024
FILTER
CONTROL IF
SDO
EXT_OSC
CLOCK OSCILLATOR
The EL5325A requires an internal clock or external clock to
refresh its outputs. The outputs are refreshed at the falling
OSC clock edges. The output refreshed switches open at the
rising edges of the OSC clock. The driving load shouldn’t be
changed at the rising edges of the OSC clock. Otherwise, it
will generate a voltage error at the outputs. This clock may be
where data is the decimal value of the 10-bit data binary
input code.
The output voltages from the EL5325A will be derived from
the reference voltages present at the V REFL and V REFH
pins. The impedance between those two pins is about 32k Ω .
Care should be taken that the system design holds these two
reference voltages within the limits of the power rails of the
EL5325A. GND < V REFH ≤ V S and GND ≤ V REFL ≤ V REFH .
In some LCD applications that require more than 12
channels, the system can be designed such that one
EL5325A will provide the Gamma correction voltages that
are more positive than the V COM potential. The second
EL5325A can provide the Gamma correction voltage more
negative than the V COM potential. The Application Drawing
shows a system connected in this way.
input or output via the clock pin labeled OSC. The internal
clock is provided by an internal oscillator running at
approximately 21kHz and can be output to the OSC pin. In a 2
chip system, if the driving loads are stable, one chip may be
programmed to use the internal oscillator; then the OSC pin
will output the clock from the internal oscillator. The second
chip may have the OSC pin connected to this clock source.
For transient load application, the external clock Mode
should be used to ensure all functions are synchronized
together. The positive edge of the external clock to the OSC
pin should be timed to avoid the transient load effect. The
Application Drawing shows the LCD H rate signal used, here
the positive clock edge is timed to avoid the transient load of
the column driver circuits.
After power on, the chip will start with the internal oscillator
mode. At this time, the OSC pin will be in a high impedance
condition to prevent contention. By setting B14 to high, the
8
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