参数资料
型号: EL7535IY-T7
厂商: Intersil
文件页数: 8/9页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ .35A 10MSOP
标准包装: 1,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 6 V
输入电压: 2.5 V ~ 6 V
PWM 型: 电压模式
频率 - 开关: 1.4MHz
电流 - 输出: 350mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
EL7535
relationship:
Layout Considerations
f P = ---------------------------------------
1
2 π ( R 1 R 2 ) C 4
(EQ. 5)
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
Current Limit and Short-Circuit Protection
The current limit is set at about 1.5A for the PMOS. When a
short-circuit occurs in the load, the preset current limit
restricts the amount of current available to the output, which
causes the output voltage to drop below the preset voltage.
In the meantime, the excessive current heats up the
regulator until it reaches the thermal shut-down point.
Thermal Shut-Down
Once the junction reaches about +145°C, the regulator shuts
down. Both the P-Channel and the N-Channel MOSFETs
turn off. The output voltage will drop to zero. With the output
MOSFETs turned off, the regulator will soon cool down.
Once the junction temperature drops to about +130°C, the
regulator will restart again in the same manner as EN pin
connects to logic HI.
Thermal Performance
The EL7535 is in a fused-lead 10 Ld MSOP package.
Compared with regular 10 Ld MSOP package, the fused-lead
package provides lower thermal resistance. The θ JA is
+100°C/W on a 4-layer board and +125°C/W on 2-layer
board. Maximizing the copper area around the pins will further
improve the thermal performance.
8
followed:
? Separate the Power Ground ( ) and Signal Ground ( );
connect them only at one point right at the pins
? Place the input capacitor as close to V IN and PGND pins
as possible
? Make the following PC traces as small as possible:
- from L X pin to L
- from C O to PGND
? If used, connect the trace from the FB pin to R 1 and R 2 as
close as possible
? Maximize the copper area around the PGND pin
? Place several via holes under the chip to additional ground
plane to improve heat dissipation
The demo board is a good example of layout based on this
outline. Please refer to the EL7535 Application Note.
FN7003.6
February 26, 2008
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