参数资料
型号: EL8176AIWZ-T7A
厂商: Intersil
文件页数: 6/18页
文件大小: 0K
描述: IC OPAMP SGL R-R I/O SOT23-6
标准包装: 1
放大器类型: 通用
电路数: 1
输出类型: 满摆幅
转换速率: 0.13 V/µs
增益带宽积: 400kHz
-3db带宽: 1MHz
电流 - 输入偏压: 500pA
电压 - 输入偏移: 50µV
电流 - 电源: 55µA
电流 - 输出 / 通道: 31mA
电压 - 电源,单路/双路(±): 2.4 V ~ 5.5 V,±1.2 V ~ 2.75 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-6
供应商设备封装: SOT-23-6
包装: 剪切带 (CT)
产品目录页面: 1234 (CN2011-ZH PDF)
其它名称: EL8176AIWZ-T7ACT
14
FN7436.8
April 3, 2009
Applications Information
Introduction
The EL8176 is a rail-to-rail input and output micro-power
precision single supply operational amplifier with an enable
feature. The device achieves rail-to-rail input and output
operation and eliminates the concerns introduced by a
conventional rail-to-rail I/O operational amplifier as
discussed below.
Rail-to-Rail Input
The input common-mode voltage range of the EL8176 goes
from negative supply to positive supply without introducing
offset errors or degrading performance associated with a
conventional rail-to-rail input operational amplifier. Many
rail-to-rail input stages use two differential input pairs, a
long-tail PNP (or PFET) and an NPN (or NFET). Severe
penalties have to be paid for this circuit topology. As the input
signal moves from one supply rail to another, the operational
amplifier switches from one input pair to the other causing
drastic changes in input offset voltage and an undesired
change in magnitude and polarity of input offset current.
The EL8176 achieves input rail-to-rail without sacrificing
important precision specifications and without degrading
distortion performance. The EL8176's input offset voltage
exhibits a smooth behavior throughout the entire
common-mode input range. The input bias current versus
the common-mode voltage range for the EL8176 gives us an
undistorted behavior from typically 10mV above the negative
rail all the way up to the positive rail.
Input Bias Current Compensation
The input bias currents as low as 500pA are achieved while
maintaining an excellent bandwidth for a micro-power
operational amplifier. Inside the EL8176 is an input bias
canceling circuit. The input stage transistors are still biased
with an adequate current for speed but the canceling circuit
sinks most of the base current, leaving a small fraction as
input bias current. The input bias current
compensation/cancellation is stable from -40°C to +125°C
and operates from typically 10mV to the positive supply rail.
Rail-to-Rail Output
A pair of complementary MOSFET devices achieves rail-to-rail
output swing. The NMOS sinks current to swing the output in
the negative direction. The PMOS sources current to swing the
output in the positive direction. The EL8176 with a 100k
Ω load
will swing to within 3mV of the supply rails.
Enable/Disable Feature
The EL8176, in the SOT-23 and SO packages, offers an EN
pin. The active low EN pin disables the device when pulled
up to at least 2.0V. When disabled, the output is in a high
impedance state and the part consumes typically 3A. When
disabled, the high impedance output allows multiple parts to
be MUXed together. When configured as a MUX, the outputs
are tied together in parallel and a channel can be selected by
pulling the EN pin to 0.8V or lower.The EN pin has an
internal pull-down. If left open or floating, the EN pin will
internally be pulled low, enabling the part by default.
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage of the EL8176, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating
of the circuit board will reduce surface moisture and provide
a humidity barrier, reducing parasitic resistance on the
board. The use of guard rings around the amplifier inputs will
further reduce leakage currents. Figure 49 shows how the
guard ring should be configured and Figure 50 shows the top
view of how a surface mount layout can be arranged. The
guard ring does not need to be a specific width, but it should
form a continuous loop around both inputs. By setting the
guard ring voltage equal to the voltage at the non-inverting
input, parasitic capacitance is minimized as well. For further
reduction of leakage currents, components can be mounted
to the PC board using Teflon standoff insulators.
4
3
1
EL8176
IN
V+
FIGURE 49.
HIGH IMPEDANCE INPUT
6
5
2
FIGURE 50.
EL8176
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