参数资料
| 型号： | EL8300ISZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 3/14页 |
| 文件大小： | 0K |
| 描述： | IC AMP TRIPLE 200MHZ R-R 16-SOIC |
| 标准包装： | 1 |
| 放大器类型： | 电压反馈 |
| 电路数： | 3 |
| 输出类型： | 满摆幅 |
| 转换速率： | 200 V/µs |
| 增益带宽积： | 100MHz |
| -3db带宽： | 200MHz |
| 电流 - 输入偏压： | 1.4µA |
| 电压 - 输入偏移： | 800µV |
| 电流 - 电源： | 2mA |
| 电流 - 输出 / 通道： | 65mA |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 5 V，±1.5 V ~ 2.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 标准包装 |
| 其它名称： | EL8300ISZ-T7DKR |
11
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 28 shows a gain of 2 connections for EL8300.
Figure 29 shows the complete input video signal applied at
the input, as well as the output signal with the negative going
sync pulse removed.
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8300 can be used for multiplexing applications.
Figure 30 shows two channels with the outputs tied together,
driving a back terminated 75
video load. A 2VP-P 2MHz
sine wave is applied to Amp A and a 1VP-P 2MHz sine wave
is applied to Amp B. Figure 31 shows the ENABLE signal
and the resulting output waveform at VOUT. Observe the
break-before-make operation of the multiplexing. Amp A is
on and VIN1 is passed through to the output when the
ENABLE signal is low and turns off in about 25ns when the
ENABLE signal is high. About 200ns later, Amp B turns on
and VIN2 is passed through to the output. The break-before-
make operation ensures that more than one amplifier isn’t
trying to drive the bus at the same time.
SINGLE SUPPLY VIDEO LINE DRIVER
The EL8300 is wideband rail-to-rail output op amplifiers with
large output current, excellent dG, dP, and low distortion that
allow them to drive video signals in low supply applications.
Figure 32 is the single supply non-inverting video line driver
configuration and Figure 33 is the inverting video ling driver
configuration. The signal is AC coupled by C1. R1 and R2
are used to level shift the input and output to provide the
largest output swing. RF and RG set the AC gain. C2 isolates
the virtual ground potential. RT and R3 are the termination
resistors for the line. C1, C2 and C3 are selected big enough
to minimize the droop of the luminance signal.
FIGURE 28. SYNC PULSE REMOVER
5V
1K
VOUT
VIN
75
+
-
75
1K
75
VS+
VS-
FIGURE 29. VIDEO SIGNAL
1V
0.5V
0V
1V
0.5V
0V
M = 10s/DIV
VOUT
VIN
FIGURE 30. TWO TO ONE MULTIPLEXER
+2.5V
1K
2MHz
75
+
-
1K
75
-2.5V
VOUT
75
1VP-P
B
+2.5V
1K
2MHz
+
-
1K
75
-2.5V
2VP-P
A
ENABLE
FIGURE 31. ENABLE SIGNAL
0V
-0.5V
-1.5V
-2.5V
1V
0V
M = 50ns/DIV
A
ENABLE
B
-1V
EL8300
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