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参数资料
| 型号： | EM4150A5CB2RC |
| 英文描述： | Optimized Multiphase PWM Controller with 6-Bit DAC and Programmable Internal Temperature Compensation for VR10.X Application; Temperature Range: 0°C to 70°C; Package: 28-SOIC T&R |
| 中文描述： | 模拟杂项 |
| 文件页数： | 2/14页 |
| 文件大小： | 197K |
| 代理商： | EM4150A5CB2RC |
EM4150
EM4350
Copyright
2002, EM Microelectronic-Marin SA
10
www.emmicroelectronic.com
Communication from Transponder to the Transceiver ( READ MODE)
The EM4150 modulates the amplitude of the RF field to transmit data to the transceiver. Data are output serially from the
EEPROM and Manchester encoded.
1 bit
64 periods of RF field (Opt64)
32 periods of RF field (Opt32)
Coded Data Measured on the COIL
Data from EEPROM
32 periods (Opt64)
16 periods (Opt32)
1 bit
Opt64 is the chip option with a bit period corresponding to 64 periods of the RF field
Opt32 is the chip option with a bit period corresponding to 32 periods of the RF field
Fig. 21
The EM4150 uses different patterns to send status information to the transceiver. Their structure can not be confused with a
bit pattern sequence. These patterns are the Listen Window (LIW) to inform the transceiver that data can be accepted, the
Acknowledge (ACK) indicating proper communication and end of EEPROM write, and the No Acknowledge (NAK) when
something is wrong.
The LIW, due to its special structure, can be used to synchronize the transceiver during a read operation. The LIW is sent
before each word, and is sent twice before FWR.
LIW
ACK
NAK
All numbers represent number of periods of RF field
32 32
128
64
32 32
96
32
64
32 32
96
32
96
32
16 16
48
16
32
16 16
48
16
48
16
16 16
64
32
(Opt64)
(Opt32)
(Opt64)
(Opt32)
(Opt64)
(Opt32)
Opt64 is the chip option with a bit period corresponding to 64 periods of the RF field
Opt32 is the chip option with a bit period corresponding to 32 periods of the RF field
Fig. 22
Communication from the Transceiver to the Transponder (RECEIVE MODE)
The EM4150 can be switched to the Receive Mode ONLY DURING A LISTEN WINDOW. The Transceiver is synchronized
with the incoming data from the transponder and expects a LIW before each word. During the phase where the chip has its
modulator "ON" (64/32 periods of RF [Opt64/Opt32] ), the transceiver has to send a bit "0". A certain phase shift in the read
path of the transceiver can be accepted due to the fact that when entering Receive Mode, the Transceiver becomes the
Master.
At reception of the first "0", the chip immediately stops the LIW sequence and then expects another bit "0" to activate the
receive mode. Once the EM4150 has received the first bit "0", the transceiver is imposing the timing for synchronisation.
The EM4150 turns "ON" its modulator at the beginning of each frame of a bit period. To send a logic "1" bit, the transceiver
continues to send clocks without modulation. After half a bit period, the modulation device of the EM4150 is turned "OFF"
allowing recharge of the internal supply capacitor. To send a logic "0" bit, the transceiver stops sending clocks (100%
modulation) during the first half of a bit period. The transceiver must not turn "OFF" the field after 7/4 clocks of the bit period
(Opt64/Opt32). The field is stopped for the remaining first half of the bit period, and then turned "ON" again for the second
half of the bit period. The 32rd/16th clock (Opt64/Opt32) defines the end of the bit
To ensure synchronisation between the transceiver and the transponder, a logic bit set to "0" has to be transmitted at
regular intervals. The RM pattern consists of two bits set to "0" thus allowing initial synchronisation. In addition, the chosen
data structure contains even parity bits which will not allow more than eight consecutive bits set to logic "1" where no
modulation occurs.
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