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参数资料
| 型号： | EM73MA89B |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: -40°C to 85°C; Package: 8-EPSOIC T&R |
| 中文描述： | 4，液晶产品位微控制器 |
| 文件页数： | 31/64页 |
| 文件大小： | 331K |
| 代理商： | EM73MA89B |
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37
* This specification are subject to be changed without notice.
EM73MA89B
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
10.15.2002 (V1.3)
; READ DATA
INA
P11
; read DATA_ADR
STA
TEMP
INA
P11
STA
TEMP+1
:
WATCH-DOG-TIMER (WDT)
Watch-dog-timer can help user to detect the malfunction (runaway) of CPU and give system a timeup signal every
certain time. User can use the time up signal to give system a reset signal when system is fail.
This function is available by mask option. If the mask option of WDT is enabled, it will stop counting when CPU
is reseted or in the STOP operation mode.
The basic structure of Watch-Dog-Timer control is composed by a 4-stage binary counter and a control unit.
The WDT counter counts for a certain time to check the CPU status, if there is no malfunction happened, the
counter will be cleared and continue counting. Otherwise, if there is a malfunction happened, the WDT control
will send a WDT signal (low active) to reset CPU. The WDT checking period is assign by P21 (WDT command
port).
0
WDT control
WDT
command port
12
3
counter clear request
RESET pin
LXIN/2
13
WDT counter
P21
mask option
P21 is the control port of watch-dog-timer, and the WDT time up signal is connected to RESET.
Port 21
3210
Initial value :0000
CWC
*
WDT
CWC
Clear watchdog timer counter
0
Clear counter then return to 1
1
Nothing
WDT
Set watch-dog-timer detect time
0
3 x 213/LXIN = 3 x 213/32K Hz = 0.75 sec
1
7 x 213/LXIN = 7 x 213/32K Hz = 1.75 sec
PROGRAM EXAMPLE
To enable WDT with 7 x 213/LXIN detection time.
LDIA
#0001B
OUTA
P21
; set WDT detection time and clear WDT counter
:
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