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| 型号： | EP1C4T240C7ES |
| 厂商： | Altera Corporation |
| 英文描述： | Cyclone FPGA Family Data Sheet |
| 中文描述： | 气旋的FPGA系列数据手册 |
| 文件页数： | 5/104页 |
| 文件大小： | 763K |
| 代理商： | EP1C4T240C7ES |
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Altera Corporation
January 2007
1–3
Preliminary
Features
Cyclone devices are available in quad flat pack (QFP) and space-saving
FineLine
BGA packages (see
Table 1–2
through
1–3
).
Vertical migration means you can migrate a design from one device to
another that has the same dedicated pins, JTAG pins, and power pins, and
are subsets or supersets for a given package across device densities. The
largest density in any package has the highest number of power pins; you
must use the layout for the largest planned density in a package to
provide the necessary power pins for migration.
For I/O pin migration across densities, cross-reference the available I/O
pins using the device pin-outs for all planned densities of a given package
type to identify which I/O pins can be migrated. The Quartus
II
software can automatically cross-reference and place all pins for you
when given a device migration list. If one device has power or ground
pins, but these same pins are user I/O on a different device that is in the
migration path,the Quartus II software ensures the pins are not used as
user I/O in the Quartus II software. Ensure that these pins are connected
to the appropriate plane on the board. The Quartus II software reserves
I/O pins as power pins as necessary for layout with the larger densities
in the same package having more power pins.
Table 1–2. Cyclone Package Options & I/O Pin Counts
Device
100-Pin TQFP
(1)
144-Pin TQFP
(1)
,
(2)
240-Pin PQFP
(1)
256-Pin
FineLine BGA
324-Pin
FineLine BGA
400-Pin
FineLine BGA
EP1C3
65
104
EP1C4
249
301
EP1C6
98
185
185
EP1C12
173
185
249
EP1C20
233
301
Notes to
Table 1–2
:
(1)
TQFP: thin quad flat pack.
PQFP: plastic quad flat pack.
(2)
Cyclone devices support vertical migration within the same package (i.e., designers can migrate between the
EP1C3 device in the 144-pin TQFP package and the EP1C6 device in the same package)
相关PDF资料 |
PDF描述 |
|---|---|
| EP1C4T240C8ES | Cyclone FPGA Family Data Sheet |
| EP1C4T240I6ES | Cyclone FPGA Family Data Sheet |
| EP1C4T240I8ES | Cyclone FPGA Family Data Sheet |
| EP1C4T256C6ES | Cyclone FPGA Family Data Sheet |
| EP1C4T256C7ES | Cyclone FPGA Family Data Sheet |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EP1C6F256C6 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP1C6F256C6N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP1C6F256C7 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP1C6F256C7N | 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
| EP1C6F256C8 | 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256 |
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