参数资料
型号: EP1C4T256C8ES
厂商: Altera Corporation
英文描述: Cyclone FPGA Family Data Sheet
中文描述: 气旋的FPGA系列数据手册
文件页数: 67/104页
文件大小: 763K
代理商: EP1C4T256C8ES
Altera Corporation
January 2007
3–5
Preliminary
SignalTap II Embedded Logic Analyzer
1
Cyclone devices must be within the first 8 devices in a JTAG
chain. All of these devices have the same JTAG controller. If any
of the Cyclone devices are in the 9th or after they will fail
configuration. This does not affect the SignalTap
II logic
analyzer.
f
For more information on JTAG, see the following documents:
AN 39: IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices
Jam Programming & Test Language Specification
SignalTap II
Embedded Logic
Analyzer
Cyclone devices feature the SignalTap II embedded logic analyzer, which
monitors design operation over a period of time through the IEEE
Std. 1149.1 (JTAG) circuitry. A designer can analyze internal logic at speed
without bringing internal signals to the I/O pins. This feature is
particularly important for advanced packages, such as FineLine BGA
packages, because it can be difficult to add a connection to a pin during
the debugging process after a board is designed and manufactured.
Configuration
The logic, circuitry, and interconnects in the Cyclone architecture are
configured with CMOS SRAM elements. Altera FPGAs are
reconfigurable and every device is tested with a high coverage
production test program so the designer does not have to perform fault
testing and can instead focus on simulation and design verification.
Cyclone devices are configured at system power-up with data stored in
an Altera configuration device or provided by a system controller. The
Cyclone device's optimized interface allows the device to act as controller
in an active serial configuration scheme with the new low-cost serial
configuration device. Cyclone devices can be configured in under 120 ms
using serial data at 20 MHz. The serial configuration device can be
programmed via the ByteBlaster II download cable, the Altera
Programming Unit (APU), or third-party programmers.
In addition to the new low-cost serial configuration device, Altera offers
in-system programmability (ISP)-capable configuration devices that can
configure Cyclone devices via a serial data stream. The interface also
enables microprocessors to treat Cyclone devices as memory and
configure them by writing to a virtual memory location, making
reconfiguration easy. After a Cyclone device has been configured, it can
be reconfigured in-circuit by resetting the device and loading new data.
Real-time changes can be made during system operation, enabling
innovative reconfigurable computing applications.
相关PDF资料
PDF描述
EP1C4T256I6ES Cyclone FPGA Family Data Sheet
EP1C4T256I7ES Cyclone FPGA Family Data Sheet
EP1C4T256I8ES Cyclone FPGA Family Data Sheet
EP1C4T324C6ES Cyclone FPGA Family Data Sheet
EP1C4T324C7ES Cyclone FPGA Family Data Sheet
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EP1C6F256C6N 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP1C6F256C7 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP1C6F256C7N 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP1C6F256C8 功能描述:FPGA - 现场可编程门阵列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256