参数资料
型号: EP1K50FI256-3F
英文描述: Field Programmable Gate Array (FPGA)
中文描述: 现场可编程门阵列(FPGA)
文件页数: 78/86页
文件大小: 1263K
代理商: EP1K50FI256-3F
8
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Figure 1. ACEX 1K Device Block Diagram
ACEX 1K devices provide six dedicated inputs that drive the flipflops’
control inputs and ensure the efficient distribution of high-speed, low-
skew (less than 1.0 ns) control signals. These signals use dedicated routing
channels that provide shorter delays and lower skews than the FastTrack
Interconnect routing structure. Four of the dedicated inputs drive four
global signals. These four global signals can also be driven by internal
logic, providing an ideal solution for a clock divider or an internally
generated asynchronous clear signal that clears many registers in the
device.
I/O Element
(IOE)
Logic Array
Block (LAB)
Row
Interconnect
IOE
Local Interconnect
IOE
Logic Element (LE)
Column
Interconnect
IOE
EAB
Logic
Array
IOE
Embedded Array Block (EAB)
Embedded Array
IOE
Logic Array
IOE
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相关代理商/技术参数
参数描述
EP1K50FI484-1DX 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-1F 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-1P 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-1X 制造商:未知厂家 制造商全称:未知厂家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FI484-2 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Altera Corporation 功能描述: