参数资料
型号: EP20K1000EFI1020-2X
英文描述: Li-ion/Li Polymer Battery Charger; Temperature Range: 0&degC to 70°C; Package: 10-DFN
中文描述: FPGA的
文件页数: 61/114页
文件大小: 1623K
代理商: EP20K1000EFI1020-2X
50
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Figure 30. Specifications for the Incoming & Generated Clocks
The tI parameter refers to the nominal input clock period; the tO parameter refers to the
nominal output clock period.
Table 15 summarizes the APEX 20K ClockLock and ClockBoost
parameters for -1 speed-grade devices.
Table 15. APEX 20K ClockLock & ClockBoost Parameters for -1 Speed-Grade
Devices (Part 1 of 2)
Symbol
Parameter
Min
Max
Unit
fOUT
Output frequency
25
180
MHz
fCLK1 (1)
Input clock frequency (ClockBoost
clock multiplication factor equals 1)
25
180
MHz
fCLK2
Input clock frequency (ClockBoost
clock multiplication factor equals 2)
16
90
MHz
fCLK4
Input clock frequency (ClockBoost
clock multiplication factor equals 4)
10
48
MHz
tOUTDUTY
Duty cycle for
ClockLock/ClockBoost-generated
clock
40
60
%
fCLKDEV
Input deviation from user
specification in the Quartus II
software (ClockBoost clock
multiplication factor equals 1) (2)
25,000
PPM
tR
Input rise time
5
ns
tF
Input fall time
5
ns
Input
Clock
ClockLock
Generated
Clock
f CLK1 f CLK2
f CLK4
t INDUTY
t I + t CLKDEV
t R
t F
t O
t I + t INCLKSTB
t O
tO
t JITTER
tO + t JITTER
t OUTDUTY
,,
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EP20K1000EFI672-2X 功能描述:FPGA - 现场可编程门阵列 CPLD - APEX 20K 2560 Macros 508 IO RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256