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参数资料
型号： EP4SGX180FF35C3N
厂商： Altera
文件页数： 79/82页
文件大小： 0K
描述： IC STRATIX IV GX 180K 1152FBGA
产品培训模块： Stratix IV FPGAs
Three Reasons to Use FPGA's in Industrial Designs
特色产品： Stratix? IV Series FPGAs
标准包装： 3
系列： Stratix® IV GX
LAB/CLB数： 7030
逻辑元件/单元数： 175750
RAM 位总计： 13954048
输入/输出数： 564
电源电压： 0.87 V ~ 0.93 V
安装类型： 表面贴装
工作温度： 0°C ~ 85°C
封装/外壳： 1152-BBGA
供应商设备封装： 1152-FBGA（27x27）
其它名称： 544-2627
2–2
Chapter 2: Addendum to the Stratix IV Device Handbook
Stratix IV Device Handbook
February 2011
Altera Corporation
Volume 4: Device Datasheet and Addendum
Document Revision History
Table 2–1 lists the revision history for this chapter.
Table 2–1. Document Revision History
Date
Version
Changes
February 2011
1.5
■ Removed the “Decision Feedback Equalization (DFE)” section now that AN 612: Decision
Feedback Equalization in Stratix IV Devices is published.
■ Moved the “Adaptive Equalization (AEQ)” sections to the Dynamic Reconfiguration in
Stratix IV Devices chapter.
■ Moved the “Power-On Reset Circuitry” and “Power-On Reset Specifications” sections to
the Hot Socketing and Power-On Reset in Stratix IV Devices chapter.
■ Minor text edits.
September 2010
1.4
■ Added corrections for the Adaptive Equalization (AEQ) section of the Stratix IV Dynamic
Reconfiguration chapter.
■ Added new information for the Decision Feedback Equalization (DFE) feature.
April 2010
1.3
■ Added corrections for the “Power-On Reset Circuitry” and “Power-On Reset
Specifications” sections to of the Hot Socketing and Power-On Reset in Stratix IV Devices
chapter.
March 2010
1.2
■ Moved the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correct
Power-Up Sequence for Production Devices”, and “Correct Power-Up Sequence for
Production Devices” sections to the Hot Socketing and Power-On Reset in Stratix IV
Devices chapter.
■ Moved the “Power-On Reset Circuit” and “JTAG TMS and TDI Pin Pull-Up Resistor Value
Specification” sections to the Configuration, Design Security, Remote System Upgrades
with Stratix IV Devices chapter.
■ Moved the “Summary of OCT Assignments” section to the I/O Features in Stratix IV
Devices chapter.
February 2010
1.1
■ Added the “Power-On Reset Circuitry”, “Power-On Reset Specifications”, “Correction to
POR Signal Pulse Width Delay Times”, “Correct Power-Up Sequence for Production
Devices”, “Power-On Reset Circuit”, “Summary of OCT Assignments”, and “JTAG TMS
and TDI Pin Pull-Up Resistor Value Specification” sections.
■ Minor text edits.
November 2009
1.0
■ Stratix IV GX enhanced transceiver data rate specifications in
–4 commercial speed grade.
■ Initial release.
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相关代理商/技术参数
参数描述
EP4SGX180FF35C4 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SGX180FF35C4N 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SGX180FF35I3 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SGX180FF35I3N 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
EP4SGX180FF35I4 功能描述:FPGA - 现场可编程门阵列 FPGA - Stratix IV GX 7030 LABs 564 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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