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参数资料
型号： EP9312-EBZ
厂商： Cirrus Logic, Inc.
英文描述： Universal Platform System-on-chip Processor
中文描述： 通用平台系统芯片处理器
文件页数： 4/62页
文件大小： 884K
代理商： EP9312-EBZ
4
Copyright 2005 Cirrus Logic (All Rights Reserved)
DS515PP7
EP9312
Universal Platform SOC Processor
List of Figures
Figure 1. Timing Diagram Drawing Key .................................................................................14
Figure 2. SDRAM Load Mode Register Cycle Timing Measurement .....................................15
Figure 3. SDRAM Burst Read Cycle Timing Measurement ...................................................16
Figure 4. SDRAM Burst Write Cycle Timing Measurement ...................................................17
Figure 5. SDRAM Auto Refresh Cycle Timing Measurement ................................................18
Figure 6. Static Memory Single Word Read Cycle Timing Measurement ..............................19
Figure 7. Static Memory Single Word Write Cycle Timing Measurement ..............................20
Figure 8. Static Memory Multiple Word Read 8-bit Cycle Timing Measurement ....................21
Figure 9. Static Memory Multiple Word Write 8-bit Cycle Timing Measurement ....................22
Figure 10. Static Memory Multiple Word Read 16-bit Cycle Timing Measurement ................23
Figure 11. Static Memory Multiple Word Write 16-bit Cycle Timing Measurement ................24
Figure 12. Static Memory Burst Read Cycle Timing Measurement .......................................25
Figure 13. Static Memory Burst Write Cycle Timing Measurement .......................................26
Figure 14. Static Memory Single Read Wait Cycle Timing Measurement .............................27
Figure 15. Static Memory Single Write Wait Cycle Timing Measurement ..............................28
Figure 16. Static Memory Turnaround Cycle Timing Measurement .......................................29
Figure 17. Register Transfer to/from Device ..........................................................................31
Figure 18. PIO Data Transfer to/from Device .........................................................................33
Figure 19. Initiating an Ultra DMA data-in Burst .....................................................................35
Figure 20. Sustained Ultra DMA data-in Burst .......................................................................36
Figure 21. Host Pausing an Ultra DMA data-in Burst .............................................................36
Figure 22. Device Terminating an Ultra DMA data-in Burst ...................................................37
Figure 23. Host Terminating an Ultra DMA data-in Burst .......................................................38
Figure 24. Initiating an Ultra DMA data-out Burst ..................................................................39
Figure 25. Sustained Ultra DMA data-out Burst .....................................................................40
Figure 26. Device Pausing an Ultra DMA data-out Burst .......................................................40
Figure 27. Host Terminating an Ultra DMA data-out Burst ....................................................41
Figure 28. Device Terminating an Ultra DMA data-out Burst .................................................42
Figure 29. Ethernet MAC Timing Measurement .....................................................................44
Figure 30.
TI
Single Transfer Timing Measurement ...............................................................46
Figure 31. Microwire Frame Format, Single Transfer ............................................................46
Figure 32. SPI Format with SPH=1 Timing Measurement .....................................................47
Figure 33. Inter-IC Sound (I2S) Timing Measurement ...........................................................48
Figure 34. AC ‘97 Configuration Timing Measurement ..........................................................49
Figure 35. LCD Timing Measurement ....................................................................................50
Figure 36. ADC Transfer Function .........................................................................................51
Figure 37. JTAG Timing Measurement ..................................................................................52
Figure 38. 352 Pin PBGA Pin Diagram ..................................................................................53
Figure 40. 352 PIN BGA PINOUT ...................................................................................55
相关PDF资料
PDF描述
EP9312-IB Universal Platform System-on-chip Processor
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EP9315-IB Metal Strip Resistor; Series:WSL; Resistance:0.003ohm; Resistance Tolerance:+/- 1 %; Power Rating:0.25W; Temperature Coefficient:+/-150 ppm; Package/Case:1206; Terminal Type:PCB Surface Mount; Leaded Process Compatible:Yes
相关代理商/技术参数
参数描述
EP9312-IB 功能描述:微处理器 - MPU IC Universal Platfrm ARM9 SOC Prcessor RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
EP9312-IBZ 功能描述:微处理器 - MPU IC Universal Platfrm ARM9 SOC Prcessor RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324
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EP9314 制造商:PCA 制造商全称:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines
EP9315 制造商:PCA 制造商全称:PCA ELECTRONICS INC. 功能描述:14 Pin DIP 5 Tap Low-Profile TTL Compatible Active Delay Lines
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