参数资料
型号: EP9312-IBZ
厂商: CIRRUS LOGIC INC
元件分类: 微控制器/微处理器
英文描述: Universal Platform System-on-chip Processor
中文描述: 32-BIT, 184 MHz, RISC PROCESSOR, PBGA352
封装: 27 X 27 MM, LEAD FREE, PLASTIC, BGA-352
文件页数: 14/62页
文件大小: 884K
代理商: EP9312-IBZ
14
Copyright 2005 Cirrus Logic (All Rights Reserved)
DS515PP7
EP9312
Universal Platform SOC Processor
Timings
Timing Diagram Conventions
This data sheet contains one or more timing diagrams. The following key explains the components used in these
diagrams. Any variations are clearly labelled when they occur. Therefore, no additional meaning should be attached
unless specifically stated.
Figure 1. Timing Diagram Drawing Key
Timing Conditions
Unless specified otherwise, the following conditions are true for all timing measurements.
T
A
= 0 to 70° C
CVDD = VDD_PLL = 1.8V
RVDD = 3.3 V
All grounds = 0 V
Logic 0 = 0 V, Logic 1 = 3.3 V
Output loading = 50 pF
Timing reference levels = 1.5 V
The Processor Bus Clock (HCLK) is programmable and is set by the user. The frequency is typically between
33 MHz and 100 MHz (92 MHz for industrial conditions).
Clock
High to Low
High/Low to High
Bus Change
Bus Valid
Undefined/Invalid
Valid Bus to Tristate
Bus/Signal Omission
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